Wide survey of different hardware adders, multiliers, dividers (design)

Question

I want to learn, how computer hardware is organized in lowest level. I'm interested in VLSI (microprocessors) internal structure, schematics, algorithms of fast mathematic.

I search for good survey of hardware design and implementation variants. How modern adders, multipliers and dividers can be implemented for multi-gigaherz chips (up to 5-10 GHz).

I need good, wide and rather deep survey. It can ever be a book.

Thanks

Upd. Just found one interesting http://www.aoki.ecei.tohoku.ac.jp/arith/mg/algorithm.html - Hardware algorithms for arithmetic modules. Even with generator of arithmetics modules in verilog. But which of described schemes are used in modern processors? And what about dividers?

Answer 1

Computer Organization ~ Carl Hamacher, Zvonko Vranesic

Answer 2

Check out the texts at digilent. They are focused a bit more on the practical aspects, but would be good if you are not familiar with doing design and testing using FPGAs. They also have some good FPGA design boards so you can build your chips with an FPGA and the such. The multighz part is more a function of the physical die size and that will require some study in electrodynamics and a good bit of advanced math.

http://www.digilentinc.com/Products/Catalog.cfm?NavPath=2,729&Cat=14

Also you can download the verilog files for the chip multiprocessor system that makes up the core of the new sun coolthreads processor. check out http://www.opensparc.net/ Once you get the general idea of how things work playing around with FPGAs you can start playing with what is in those files in your designs.

Answer 3

Just found one interesting http://www.aoki.ecei.tohoku.ac.jp/arith/mg/algorithm.html - Hardware algorithms for arithmetic modules. Even with generator of arithmetics modules in verilog. But which of described schemes are used in modern processors?