The "PC3" denotes that it is DDR3 memory.
The number after the PC3 denotes the maximum theoretical bandwidth of the memory, hence PC3-10600 has a theoretical bandwith of 10.6GiB per second, while the PC3-8500 has a peak bandwidth of 8.5GiB per second.
The CL number is the CAS Latency and is basically the number of clock cycles that the memory requires after a read command has been received before it is able to start returning data. With CL=9 the memory will start returning data after 9 memory clock cycles and CL=7 means it will return after 7 clock cycles.
The PC3-10600 will have a higher clock speed (1333MHz) than the PC3-8500 (1066MHz) and so it is difficult to realistically compare CL ratings between modules of different speed, though it can be useful to check modules that have the same MHz speed rating.
DDR3-xxx denotes data transfer rate, and describes raw DDR chips, whereas PC3-xxxx denotes theoretical bandwidth (with the last two digits truncated), and is used to describe assembled DIMMs. Bandwidth is calculated by taking transfers per second and multiplying by eight. This is because DDR3 memory modules transfer data on a bus that is 64 data bits wide, and since a byte comprises 8 bits, this equates to 8 bytes of data per transfer.
CL - Clock cycles between sending a column address to the memory and the beginning of the data in response
Also note that the CAS latency is only important for the first of any given transfers, after which there is a prefetch buffer:
The main benefit of DDR3 comes from the higher bandwidth made possible by DDR3's 8-burst-deep prefetch buffer, in contrast to DDR2's 4-burst-deep or DDR's 2-burst-deep prefetch buffer.
So, yes the initial request for data transfer takes slightly longer, but the higher clock speed and transfer rates will mean that any individual transfer is able to complete much faster so that while one transfer is being waited on rather than simply transferring one piece of data at a time a single request can "burst" a larger block of memory and in that case the higher transfer rate could potentially win over the faster CAS latency