In older systems, the front-side bus (FSB) was synchronously tied to the northbridge and memory controller. This meant that, without the use of clock dividers (introducing complicated and expensive PLL circuitry to keep control of the different clock rates), your memory bus would operate at the FSB speed. In your case, DDR-400 was the answer, since DDR-400 memory modules have a clock rate of 200 MHz.
Now, as history progressed, systems that still used an FSB now had a clock divider between itself and the memory controller. This allowed for the use of different memory speeds independent of the FSB speed (so if we set the FSB to 400 MHz, and had a clock ratio of 1:2, the memory would run at 400 * 1 / 2 = 200 MHz).
I assume that since this isn't a computer architectures course, and since there was only one answer, it was implicitly implied that the system did not have a clock divider. If it did (and indeed, nearly all computers since the late 90's did), we could simply solve the ratio to make any of the above listed memory modules work with the computer.
To make DDR-333 work for example, we need a memory clock of 166 MHz, or a clock divider of 5:6. For DDR3-667, we need a memory I/O clock (not memory speed, DDR3 is different) of 333 MHz, or 5:3. Finally, PC100 would work with a divider of 1:2 for a memory clock of 100 MHz.
TL,DR: Without a memory clock divider, the FSB has to match the memory clock speed. With a clock divider, so long as you can create an integer ratio X:Y to match the memory:FSB speeds, then you can use that memory module (and that ratio can be satisfied for all of the memory modules listed in your question).