Atomic operation. How does it guarantee consistency from hardware perspective ? How is it implemented in HW ?
As far as I know, atomic instruction makes sure that when it is executed, no other threads can modify that data (just like a critical section). Am I correct ?
But how is this implemented in HW ? how does hardware guarantee this ? (does hardware generate three micro instructions internally ? unlock, modify, and lock ?) what is the difference between just using mutex vs. atomic instruction ? is only difference the number of instructions ?? (1 instruction for atomic, multiple insts for normal mutex..)
Is that number of instructions difference (1 vs. many) guarantee correctness ? (like using mutex), and guarantee consistency ?
I appreciate it ! sorry for this broad-topic question. Thanks