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Ok, first let me get this straight: This is not about micro optimization.

But, I know in bootloaders on the partition, a lot use the jmp short; nop coding. But it is to my understanding that the less amount that a jmp "jumps" :) the less cycles it takes for the processor to complete, and some processors see the 0x90 and just skip it without evaluating it.

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You might want to have a look at the Intel 64 and IA-32 Architectures Software Developer Manuals, they're a great resource to understand the x86 architecture from a programmer's point of view (assuming you're comfortable with assembly already).

[...] my understanding that the less amount that a jmp "jumps" :) the less cycles it takes for the processor to complete

You need to differentiate between near and far jumps. Near jumps simply add (or subtract via 2's complement math) an offset to the instruction pointer (IP), or reload the IP offset from the current code segment (CS). Near jumps can often store the offset in the instruction word itself, or a register - so the entire jump instruction can be fetched in one cycle.

Far jumps store the actual new address of the instruction pointer in the next word, or in a memory location, so this requires an additional fetch - and thus, takes longer. On x86 and x86-64, you can not far jump to a location held in a register (it must be the next instruction word or in a location in memory).

and some processors see the 0x90 and just skip it without evaluating it.

Yes, that's the definition of what a NOP instruction is supposed to do. The CPU still has to fetch the 0x90 opcode, but the evaluation does nothing essentially.

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