I looked at the xchg and found something interesting, that it seems a
byte can be encoded into the instruction for specifying the registers
Yes, that's how most x86 instructions work. Instructions are fetched either 32 or 64 bits at a time (word length of the machine), not bytes at a time.
EAX on a 32-bit machine, and
RAX on a 64-bit machine) will be
0x90, because the register mux code for
0x00 (effectively a one cycle operation which does doing nothing). Similarly, the instruction
XCHG rBX, rAX will assemble to
0x93 (the mux code of
The opcode encoding should be listed somewhere else in the manual, or you can look on an x86 opcode map (which helps to understand how everything is muxed together). You can find one in the Intel 64 and IA-32 Architectures Software Developer Manuals (Volume 2, Appendix A.3).
So what I am wondering is how does the processor know if there is a
byte after to work with or is it that that extra register has to be of
type rAX causing it to actually still be the one byte 0x90
Here, it's the opposite. For 64-bit mode, there is actually a prefix in the instruction word itself to indicate that (
REX prefix). The processor knows what to look for based on the presence or absence of the
REX prefix - and in the absence of, the instruction is still just