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My simple understanding is as follows.

Memory (RAM) is composed of bits, groups of 8 which form bytes, each of which can be addressed ,and hence byte addressable memory.

Address Bus stores the location of a byte of memory.

If an address bus is of size 32 bits, that means it can hold upto 232 numbers and it hence can refer upto 232 bytes of memory = 4GB of memory and any memory greater than that is useless.

Data bus is used to send the value to be written to/read off the memory. If I have a data bus of size 32 bits, it means a maximum of 4 bytes can be written to/read off the memory at a time. I find no relation between this size and the maximum memory size possible.

But I read here that:

Even though most systems are byte-addressable, it makes sense for the processor to move as much data around as possible. This is done by the data bus, and the size of the data bus is where the names 8-bit system, 16-bit system, 32-bit system, 64-bit system, etc.. come from. When the data bus is 8 bits wide, it can transfer 8 bits in a single memory operation. When the data bus is 32 bits wide (as is most common at the time of writing), at most, 32 bits can be moved in a single memory operation.

This says that the size of the data bus is what gives an OS the name, 8bit, 16bit and so on. What is wrong with my understanding?

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"What is wrong with my understanding?" - You are trying to make one definition fit different things. The bit-size descriptor has been used at different times for different things. – sawdust Jul 8 '12 at 22:59
It means whatever the manufacturer says it means. Generally that will be something resembling register size, but there are many ways to fake/swizzle that. – Daniel R Hicks Jul 8 '12 at 23:31
up vote 7 down vote accepted

Generally the size of the databus is determined by the the size of the processor registers. Often it is the size of the processor registers that determine the OS type (64 vs 32). The physical bus sizes can technically differ from this (8088 as an example) but it's so rare that the author of your quote probably associates the two together.

Generally the pointer size also follows the register size but the physical address bus width can be bigger (as with the 8086 16-bit at 20) or smaller (as with the AMD 64 at 48)

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"the physical address bus width can be bigger" - Especially with 4-bit and 8-bit processors! – sawdust Jul 8 '12 at 23:10
Okay. But I'm trying to understand it trivially. I could find no relation between size of the databus and maximum possible memory ,like I could explain with address bus size. So the answer seems to be "NOT ADDRESS BUS SIZE but DATA BUS SIZE"(because it is usually as big as the processor registers). Am I missing something? – learner Jul 10 '12 at 19:22
@learner That's correct, the confusion also lies in the fact that the maximum pointer size of a system is the size of the processor registers. In a flat address space as with most modern systems that equates to being limited by the size of the processor registers, hence the addressing limitations as you pointed out. Some processors, especially older ones, utilized tricks such as special segmented addressing to get around this. – Dougvj Jul 10 '12 at 19:40
@Dougvj , Okay , it is getting clearer. But why did they make address bus sizes different from processor register sizes? Would it not make more sense to keep them the same? And I'm confused about where the addresses are kept? (the address bus or the processor register?) Thank you – learner Jul 11 '12 at 19:22
@learner That's correct. To summarize: The OS designation corresponds exactly with the size of the processor registers. The address bus may or may not be the same size as the processor registers, thus the maximum possible addressable RAM is independent from that. The processor internally, however, almost invariably has some kind of addressing scheme involving pointers that are the same size as the processor registers. – Dougvj Jul 16 '12 at 16:22

It's the register size and memory handling within the processor.

Using tricks, one 16 bit processor had a 20 bit address bus, so it's not memory external of the processor.

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There's no "pure" 32 or 64 bit system, and therefore the terms are just approximations anyway.

E.g. take your statement "Memory (RAM) is composed of bits, groups of 8 which form bytes, each of which can be addressed". That's not very common. PC's have their RAM on DIMM modules, and those are 64 bits wide. Back in the 90s, you had SIMMs, and those were 32 bits wide.

In some system DIMMs must or can be paired ("ganged"/"dual channel"), which would be a 128 bits databus. This concept predates the so-called "64 bits" processors from AMD and Intel.

Those groups of 64 bits from a single DIMM can indeed be subdivided in 8 bytes. That's doen pretty transparently by your CPU. It can also break the 64 bits in 4*16 bits, 2*32 bits, or just use all 64 bits as a single variable.

The most important question however is the width of an address. Every byte in memory has its own address, but not every bit. That means the 64 bits you get from a single DIMM have 8 addresses. The lowest of these is always a multiple of 8: Now, how many distinct addresses does the CPU support? There are two common answers, at least in theory. Some CPU's support 232 different addresses, some support 264. This distinction is the most common distinction between 32 and 64 bit systems.

In practice, 64 bit systems today support less than 264 bytes of RAM. That would be unaffordable, and wouldn't fit in a normal PC anyway. That much memory would weight several million tons !

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Is it the processor register where an address is kept ,or is it the address bus? You say "some CPUs support 2^32 different addresses..." . What are they exactly limited by? – learner Jul 10 '12 at 19:29
Typically, both the register sizes and the MMU (Memory Management Unit, the part of the CPU which is directly responsible for the memory). – MSalters Jul 11 '12 at 11:57

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