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Could someone please clarify the difference between memory and I/O addresses on the PCI/PCIe bus?

I understand that I/O addresses are 32-bit, limited to the range 0 to 4GB, and do not map onto system memory (RAM), and that memory addresses are either 32-bit or 64-bit.

I get the impression that memory addressing must map onto available RAM, is this true? That if a PCI device wishes to transfer data to a memory address, that address must exist in actual system RAM (and is allocated during PCI configuration) and not virtual memory.

So if a PCI device only needs to transfer a small amount of data at a time, where there is no advantage to putting it into RAM or using DMA, then I/O addressing is fine (e.g. a parallel port implemented on a PCI card).

And why do I keep reading that PCI/PCIe I/O addressing is being deprecated in favour of memory addressing?

Thanks!

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The physical address space is huge nowadays due to 64 bit addressing. Many devices, for example AHCI-compliant disk controllers, require quite big chunks of address space to be mapped to the device registers.

Also, the IO address space does not accessible with usual assembler instructions. It is accessible only with special instructions that can read from and write to the IO registers. This is not really convenient and inefficient in many cases.

For example the above mentioned ACPI compliant controller has some functionality that requires the processor to execute locked read-modify-write operation to change a single bit in a device register provided no other cores will be able access and modify the same register in between. With IO address space this is not possible at all.

One more point we should take to account is that the PCI bus is not unique to the x86 architecture. There are other architectures exist that has no special IO bus at all. So the device vendors prefer not to use IO addresses to stay compatible with most systems. Thus no one is using the IO address space. Then why not make de-jure the thing that is de-facto for a long time already?

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Thanks for your reply.. but could you confirm or contradict my understanding that memory addressing must map into existing RAM? –  KevinM Oct 22 '12 at 6:24
    
No. Not necessarily RAM. It may be an array of IO registers in the device. It may be onboard RAM (regular). It may be some RAM at the device (for device purposes, not as a general RAM –  Serge Oct 22 '12 at 7:29
    
Ok, thanks. In a little while I'll ask another question regarding how the BARs are configured for system RAM vs device IO registers/RAM. –  KevinM Oct 22 '12 at 7:56
    
Posted the new question here –  KevinM Oct 22 '12 at 8:16

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