I'm not familiar with the gory details of how RAM works with Intel CPU's these days given newer stuff like cache coherency and NUMA, but from the RAM's point of view I believe it's still 8-bit bytes, although RAM is now commonly arranged in channels where multiple slots can be accessed at once. So grabbing 4 bytes (assuming 4 slots) at a time is going to take the same amount of time as grabbing 1 byte on such a system. Still, the RAM accepts an address from the memory controller as input and gives it back 8 bits as output AFAIK.
"Word" size can mean different things. I remember first encountering this term studying 68000 assembly language - in the text I was reading, "byte" meant 8 bits and "word" meant 16 bits, and "word-aligned" meant an address falling on a 16-bit boundary. I know the term "word" was in use previously to the introduction of the 68000 (1980?) and may have been synonymous with "byte" in earlier times than that.
The "native" data that the CPU "prefers" to deal with matches the "bitness" of its archtecture and the mode it is running in. A 32-bit CPU (or 64-bit CPU not in "long mode") has 32-bit registers, a bunch of instructions to load values from RAM (4 bytes) into those registers and other stuf. But with Intel, a 32-bit register such as EAX can also be addressed as two registers AH (the upper 16 bits of EAX) and AL (the lower 16 bits) and there are countless MOV instructions that load stuff from RAM into EAX, AH, AL, and from there back to RAM. I'm too lazy to look at the Intel programmer's reference guide right at the moment but I think there's instructions to load single bytes to either the upper or lower 8 bits of AH or AL. (I know MIPS has instructions like that). But I think there's more instructions that work with all 32 bits, and if you want to work with less bits you take a hit in efficiency because you have to move stuf to temporary registers first and such.
So in Intel and most other general purpose CPU's made since the 16-bit era, you are really flexible in how you address memory. Instructions are likely more optimized to work in the "bitness" of the architecture, though.