The Official Specs from the SD Association should be your first port of call:
It is desirable to erase many write blocks simultaneously in order to
enhance the data throughput.
Identification of these write blocks is accomplished with the
ERASE_WR_BLK_START (CMD32), ERASE_WR_BLK_END (CMD33) commands.
The host should adhere to the following command sequence:
ERASE_WR_BLK_START, ERASE_WR_BLK_END and ERASE (CMD38).
If an erase (CMD38) or address setting (CMD32, 33) command is received
out of sequence, the card shall set the ERASE_SEQ_ERROR bit in the
status register and reset the whole sequence.
If an out of sequence command (except SEND_STATUS) is received, the
card shall set the ERASE_RESET status bit in the status register,
reset the erase sequence and execute the last command.
If the erase range includes write protected sectors, they shall be
left intact and only the non-protected sectors shall be erased. The
WP_ERASE_SKIP status bit in the status register shall be set.
The address field in the address setting commands is a write block
address in byte units. The card will ignore all LSB's below the
WRITE_BL_LEN (see CSD) size.
As described above for block write, the card will indicate that an
erase is in progress by holding DAT0 low. The actual erase time may be
quite long, and the host may issue CMD7 to deselect the card or
perform card disconnection, as described in the Block Write section,
The data at the card after an erase operation is either '0' or '1',
depends on the card vendor.
The SCR register bit DATA_STAT_AFTER_ERASE (bit 55) defines whether it
is '0' or '1'.