I want to understand how the PCI addresses are mapped to RAM addresses. I am using the below configuration on my board:
- Intel Sandy Bridge Processor
- Intel X79 Chipset
As per the specifications of the X79 chipset, I can see that Device 29: Function 0 can be mapped to 1KB anywhere in 4-GB range. Even for all the PCI devices the mapping was more or less similar.
I just wanted to know, in which register settings can we define the above mapping functionality?