Every electronics engeneer knows that connecting more chips on the same line increases its capasistence and, thus, degrades the frequency. So, memory speed must be dependent on the number of chips in the channel. How in this case the DDR memory manufacturers manage to label their devices as DDR3-1333 MHz for instance without this information? Is there a limit of chips per channel or one module per channel is assumed?
Apart from that, what if there is capacity imbalance in multicahhel architecture? Here is a recommendation from my MB manufacturer, X58A-UD3R, to use 4 modules for 3-channel mode Can I have 4GB+2GB+2GB (assuming the timings are identical)? What are performance Implications? The Intel controller says that interleaving mode is needed to make gain of 3 channels. What will happen to the interleaving when there is such capacity imbalance?
What if modules of different timings are combined? Should I choose the worst common denominator?
In other words, I want to know what are DIMM specifications depending on the environment? How are the DIMM specifications related with the environment it is supposed to work?
Originally posted in http://www.tomshardware.co.uk/answers/id-1651405/miltiple-sticks-single-channel.html