I'm an absolute beginner starting to understand the PCI Express protocol and I need some clarifications about its mechanics.
I understood that a PCI Express endpoint device may have some memory BAR mapped in the system memory (is it always RAM the system memory we are talking about?). I need to understand what happens when I send from the CPU to the device (A) a memory read request, addressing a certain memory address (first memory BAR, offset 0).
Let's assume that my device doesn't have any in-device memory.
The root complex on behalf of CPU creates the TLP and forwards it to device (A) because the memory address of destination is assigned to (A).
A receives the TLP, unpacks it, and creates a completion TLP containing data coming from its internal application logic.
Now the TLP travels backwards to the Root Complex that unpacks it, gathers the interesting data and gives it back to the the CPU.
What is the system memory role during this communication? None?
Does the root complex communicate (in this case) with the physical memory of the system, other than sending and receiving packets to/from the endpoint?
To some people it may seem a silly question but for me this is crucial to understand the connection between the physical memory and the memory address BARs assigned to each PCI Express device.