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In the context of cache for a CPU, I understand some are divided between instructions and for data. How exactly are they divided? Is one physical unit partitioned into two or are there two units containing memory of the same speed?

It's also my understanding that the size of the data cache need not equal the size of the instruction cache. This is where I have a bit of an issue. Someone told me the data cache is usually bigger. Data most likely will be more variable than instructions. I equate more variability with more cache misses and more memory reads. So wouldn't this mean the instruction cache should be bigger, not the data cache? I was told this is not true because having a bigger cache is what remedies the miss-rate. I still feel uneasy about this because unless the cache is substantially bigger than the miss-rate won't be affected that much and the overall performance goes down (it's like having too many layers of cache - is there a name for this? - similar concept to having too many indexes in a SQL database will actually slow it down).

The way I see the question is which would you want to make better? The one that initially works better or the one that initially works worse.

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have you read en.wikipedia.org/wiki/CPU_cache ? –  Mxx Mar 4 at 3:10
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