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Computer architecture upgraded from 16-bit to 32-bit to 64-bit. What was the logic for skipping 48-bit? What reasoning was used to upgrade to 64-bit and not some other exponent?

The following tables illustrates: 2^32 is 65536 times bigger than 2^16. So it seams logical to use 2^48 which is also 65536 times bigger than 2^32. Using 2^64 seems like a massive jump in comparison. (10 years after the introduction of amd64, desktop computers are sold with double digit GB RAM while servers use triple digit GB RAM.)

    2^16                        65.536
    2^32                 4.294.967.296  2^16 X 65536
    2^48           281.474.976.710.656  2^32 X 65536
    2^64    18.446.744.073.709.600.000  2^32 X 4294967296

EDIT BELOW

I used an online decimal-to-binary converter and I get these results. Apparently, 2^48 is maxed out with 48 binary 1s.

    1111111111111111                      65535  2^16 - 1 (16 ones)
    10000000000000000                     65536  2^16

    11111111111111111111111111111111                    4294967295  2^32 - 1 (32 ones)
    100000000000000000000000000000000                   4294967296  2^32

    111111111111111111111111111111111111111111111111            281474976710655 2^48 - 1 (48 ones)
    1000000000000000000000000000000000000000000000000           281474976710656 2^48

    1111111111111111111111111111111111111111111111111111111111111111    18446744073709551615    2^64 - 1 (64 ones)
    10000000000000000000000000000000000000000000000000000000000000000   18446744073709551616    2^64
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    Who said it skipped 48 bit? I would almost guarantee that someone somewhere once built a 48 bit machine. Certainly there were 8-bit, 12-bit, 15-bit, 17-bit 18-bit, 24-bit, and 60-bit, that I know of. Aug 17, 2014 at 13:12
  • @DanielRHicks PDP-11 had 11 bits, but as far as I know that is the only weird bit-size system that actually had wide-spread use outside of academic research. You should NOT include 8-bit in your list. That is one of the natural sizes :-)
    – Tonny
    Aug 17, 2014 at 13:18
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    @Tonny -- I'm pretty darn sure that PDP-11 was 16 bit. PDP-8 was 12 bit. Aug 17, 2014 at 13:20
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    Using 2^64 seems like a massive jump in comparison. Yes, just like in our 16-bit days when "64 kilobyte RAM segments are big enough" or in our 32-bit days when "a 4 gigabyte (32-bit) virtual memory scheme is sufficient". The point is to increase our capabilities in orders of magnitude - not because we need it, but solely because we might... Aug 17, 2014 at 13:21
  • And I forgot 36-bit -- the IBM 70xx line. Aug 17, 2014 at 13:23

2 Answers 2

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64 bit is the next logical step up.

The reason is mainly because the step to double (or half) the number of bits is easy to handle in software and hardware for systems that operate natively in a different size. 32-bit systems where already routinely dealing with 64 bit values internally, before 64-bit CPU's became available.

E.g: A 32-bit system can easily handle a 64-bit number by storing it in 2 32-bit variables/registers.
Dealing with a 48 bit number is awkward: You would need to either user a 32-bit and a 16-bit variable together or only use part of a 32-bit variable or use 3 16-bit variables. None of these solutions for 48-bit is optimal.

In general: Any system that works in X bits can easily handle sizes of (N * X) and (X / N), where N is a power of 2. So the logic is 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 and so on.
Every other size requires more complicated handling in hardware and/or software and is therefor sub-optimal.

So when going for a larger bit-size in hardware architecture it makes sense to use the same progression as it will only take a minor updates to Operation Systems, software and compilers to support the new bit-size.

(This all applies to the native bit-size for CPU registers. When you take about "number of address-lines" that address the RAM chips you may indeed see a smaller number then what is natural for the architecture.
Internally these CPU's use more bits, but not all bits are connected to real address-lines.
E.g: 20 lines on 8088 and 8086 cpu's, 20 lines on 80286 and 36 lines on Pentium II)

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  • Note that all that has been listed, here and in the other answers, is even more diverse as you glance at the CPUs/Chips for embedded systems. For starters the Motorola 68k processors came in a number of variants e.g. M68008 with a set of 16 32 bit registers internally, 8 bit databus and 20 bit adress bus, there also was an 001 version that was capable of switching between 8 and 16 bit databus.
    – Hannu
    Aug 17, 2014 at 15:02
  • @Hannu I know that (I started my career doing MC68000 embedded :-) a very long time ago), but I didn't want to complicate thing too much.
    – Tonny
    Aug 17, 2014 at 15:10
  • Well, I Must have been a bit later then - using the Amiga ;-)
    – Hannu
    Aug 17, 2014 at 15:12
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    It might be worth noting that the supported virtual address space can also have fewer bits than the registers used for addressing. Typically the most significant bits must be the same as (i.e., a sign extension of) the most significant used bit; this avoids compatibility issues of software packing data into an ignored field which is not ignored in a later implementation. (I think the explicit ignoring a configurable number of bits is a better option; AArc64: 0,8; SPARC S4: 0,8,16,24,32.) E.g., x86-64 only supports 48-bit virtual addresses.
    – user180742
    Aug 17, 2014 at 18:18
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What happened, basically, is byte addressing. Prior to that there was no compelling reason to have processors have a power of two word length (though generally there were physical reasons for a multiple of 2 or 4, because circuitry came in such multiples).

Prior to byte addressing the memory word was the same width as the processor word, and memory was (primarily) addressed in words. But with byte addressing there was an advantage to having "word" length be a power of two of the byte size, so that "word" boundaries would fall in a nice binary progression (nice for both humans and for computer hardware to handle).

(As to why byte addressing became "the in thing", I can't offer any compelling argument just now.)

Likely, if the standard character were 10 bits instead of 8 we'd have processors of 20, 40, 80 bits, rather than 16, 32, 64.

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