I may be using the wrong terminology, but I am looking for something that would let me multiplex multiple lower speed PCIe lanes onto a single higher speed one. For example, 3x PCIe 1.0 lanes onto 1x PCIe 3.0 lane. If I had 1x PCIe 3.0 x8, this would give me 3x PCIe 1.0 x8.
I'd expect that this would be presented to the OS as separate PCIe buses. I could do this in FPGA but was thinking there may be an ASIC for this type of application.