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I may be using the wrong terminology, but I am looking for something that would let me multiplex multiple lower speed PCIe lanes onto a single higher speed one. For example, 3x PCIe 1.0 lanes onto 1x PCIe 3.0 lane. If I had 1x PCIe 3.0 x8, this would give me 3x PCIe 1.0 x8.

I'd expect that this would be presented to the OS as separate PCIe buses. I could do this in FPGA but was thinking there may be an ASIC for this type of application.

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Basically, what you’re looking for is a PCIe Switch.

enter image description here

You provide it with some lanes and assign the downstream ports it offers to slots as desired. More information is available in the PCIe Basics slideshow.

The chip in the picture, PEX 8632, lists some common port configurations in its product brief:

  • x4 Upstream, 3× x4 + 8× x2 Downstream
  • x8 Upstream, 2× x8 + 2× x4 Downstream
  • x8 Upstream, 10× x2 Downstream
  • x16 Upstream, 2× x8 Downstream

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