2
votes
1answer
146 views

PCI BAR memory addresses

Quick question, I was reading the OSDev Wiki page regarding PCI and it says the following - "Base address Registers (or BARs) can be used to hold memory addresses used by the device, or offsets for ...
4
votes
1answer
148 views

Why can't PCIe devices share lanes?

On older chip-sets it was not possible to have a dedicated graphics card in the PEG slot and have the Integrated Graphics Device (IGD) enabled at the same time. After looking online I found this was ...
6
votes
2answers
108 views

Run 10 sets of headphones from a pc via 10 separate channels

We have a PC application that runs on Windows 7 platform that is designed to play sound to up to 10 different MP3's to up to 10 separate sound cards (ie. 10 different inputs playing to 10 different ...
1
vote
1answer
2k views

Block diagram containing computer buses,motherboard

I am trying to understand computer architecture. In particular: - Physical view i.e. what all is packed inside the motherboard and what all outside - Conceptual view. how processor,memory,peripherals ...
1
vote
1answer
6k views

PCI max throughput

Hypothetical here, but I want to understand. Say I have a hand me down machine, 4 PCI slots, 64-bit 33 MHz PCI. How much data can that PCI bus handle? System bus is 133 MHz. I want to use one ...