0
votes
1answer
27 views

How does an instruction in a CPU report that is has finished?

When an instruction is sent to a CPU, that may take multiple clock cycles to complete, when does the CPU know that the instruction has finished and can start processing the next one? I'm mostly ...
1
vote
3answers
56 views

Why do compilers have to be “smarter” for RISC instruction set architecture

Reduced Instruction Set Architecture (RISC) aims to reduce the number of instructions thereby improving performance . The only downside to this approach is that the compilers have to be "smarter" . ...
-1
votes
2answers
29 views

How does fabrication process and compiler quality affect CPU performance

I was reading up on my lectures and one of the slides listed down the factors affecting CPU performance , I cant understand how does fabrication process and compiler quality affect CPU performance
0
votes
0answers
17 views

Instruction cache vs data cache with reguards to size

In the context of cache for a CPU, I understand some are divided between instructions and for data. How exactly are they divided? Is one physical unit partitioned into two or are there two units ...
2
votes
1answer
113 views

Difference between port mapped and memory mapped access?

Can anyone explain what's the difference between port mapping and memory mapping, and what having both accomplishes? Why is there port mapped, how does it differ in structure from memory maps, and is ...
277
votes
18answers
97k views

If 32-bit machines can only handle numbers up to 2^32, why can I write 1000000000000 (trillion) without my machine crashing?

32 bit computers can only store signed integers up to 232 - 1. This is why we have run out of ipv4 addresses and have entered the 64 bit era. However, the number 232 - 1 (2,147,483,647) is not as ...
51
votes
9answers
6k views

Why have CPU manufacturers stopped increasing the clock speeds of their processors? [closed]

I have read that manufacturers stopped concentrating on higher clock speeds and are now working on other things to improve performance. With an old Desktop machine with Intel® Xeon® Processor E3110 ...
-4
votes
3answers
278 views

Is this system 32 bit or 64 bit? [closed]

I would definitely say that this system is 64 bit but the owner says it's 32. The computer is a Dell Optiplex 960 which comes both in 32 bit and 64 bit versions but I installed windows 8 64 bit ...
3
votes
1answer
250 views

Intel assembler/architecture documentation?

Would anyone know where the best "official" Intel documentation regarding the low level architecture/assembler internals would be? How the ESP works, the various registers- fetching values from RAM ...
4
votes
4answers
2k views

How can I find a list of all SSE instructions? What happens if a CPU doesn't support SSE?

So I've been reading about how processors work. Now I'm on the instructions (SSE, SSE2, etc) stuff. (Which is pretty interesting). I have lot of questions (I've been reading this stuff on Wikipedia): ...
0
votes
1answer
623 views

Is little-endian still faster on Intel processors or it does not matter if I parse big-endian on intel? [closed]

It used to be in past architectures. Is it still the case? I am reading from the network into byte buffers in Java. Basically, will read bytes on Intel using big-endian instead of little-endian ...
2
votes
1answer
225 views

Is it possible to watch interrupts on Windows?

With my linux box I can do the following to watch interrupts live: watch -n1 "cat /proc/interrupts" Is there a way to do this on Windows systems, especially Windows 7?
31
votes
5answers
3k views

Why can't you have both high instructions per cycle and high clock speed?

The Megahertz Myth became a promotional tactic due to differences between the PC's INTEL 8086 processor and Apple's Rockwell 6502 processor. The 8086 ran at 4.77MHz while the 6502 ran at 1MHz. ...
3
votes
2answers
722 views

Instruction per Cycle vs Increased Cycle Count

Increasing either instruction per cycle or increase cycle count both are valid design choice for processor manufactures. I understand theory, but it would be much clearer if I had some real life ...
5
votes
2answers
307 views

What type(s) of performance improvements to expect between architectures using QPI versus a FSB?

While comparing Intel's two new i7 processors, I noticed that the only difference between them apart from the L3 cache size and CPU speed is that one has QuickPath Interconnect, and that seems to ...
11
votes
3answers
536 views

Will a new processor with slower clockspeed run legacy applications faster?

I'm using Linux and have an old P4 with about 3 GHz clock speed. Will a newer chip that had slower clock speed run my legacy applications faster or slower? I only use one application at a time, an ...
13
votes
5answers
11k views

Is a higher core count or higher clock speed more beneficial to a computer's performance? [closed]

With lowering silicon costs and rising consumer needs, manufacturers seem to be pushing one of two things: clock speed and/or core count. With the way things are going, it doesn't seem that clock ...
2
votes
0answers
88 views

Processor Multimedia Extensions. How Useful are they actually? [closed]

Ever since the original Pentium, both AMD and Intel have been releasing competing multimedia extensions to their architectures, mmx, 3DNOW!, SSE, SSE2, SSE3, SSSE3, SSE4, AVX, XOP... So many, that I ...
57
votes
6answers
9k views

How does a CPU 'know' what commands and instructions actually mean?

How does a processor 'know' what the different commands mean? I'm thinking of assembly level commands like MOV, PUSH, CALL, etc...
2
votes
2answers
359 views

Bits of CPU, architecture and OS

I was wondering if the bits of OS, of instruction set, of CPU registers, of data bus from CPU to memory, and of address bus from CPU to memory must be consistent in some sense and how? When we cay ...
9
votes
6answers
10k views

Where exactly L1, L2 and L3 Caches located in computer?

Where exactly L1, L2 and L3 Caches Located in computer ? I know, we use Cache to increase performance by picking DATA and INSTRUCTIONS from Cache rather than Main Memory. Following are my questions ...
5
votes
9answers
17k views

How can I determine whether my processor is 32-bit or 64-bit?

How can I determine whether my processor is 32-bit or 64-bit? My processor is AMD Phenom 8450 triple-core.
0
votes
2answers
290 views

Role of a bus bridge [closed]

Simple question: What is the role of a bus bridge?
12
votes
5answers
3k views

Why multi core processors?

Why are chips containing more and more cores? Why not manufacture a larger single-core processor? Is it easier to manufacture? Is it to allow programs to multithread using seperate cores?
2
votes
5answers
6k views

How is the processing capacity of modern devices compared with that used decades ago?

I saw on t.v. a description of the computer used in the first travel to the moon. I wonder if modern devices such as an smarthphone have already that same capacity? Does anyone have a link where ...
5
votes
4answers
1k views

How does increasing the number of transistors in a chip increase its speed

Is the only purpose of transistors in a cpu to act as the switches that define its instruction set? And if so then why does increasing the number of transistors increase its speed?
2
votes
1answer
385 views

How many ALUs does a single core cpu have?

or does depend on the model?
6
votes
2answers
308 views

Intel data bus of Intel 80486 and above CPUs

Why do Intel 80486 and above CPUs have a double 32-bit internal data bus? ALU is still 32 bits wide, so what is the extra 32-bit bus for?
5
votes
5answers
619 views

Why are GPUs cheaper than CPUs?

What are the technological reasons whereby GPUs are cheaper than CPUs?
0
votes
3answers
248 views

Learning about BIOS memory, instructions and code origins

I'm learning about the BIOS and have a few questions. What is meant by, "This is the last 16 bytes of memory at the end of the first megabyte of memory"? The first instruction of BIOS is jump, which ...
2
votes
1answer
1k views

Does my motherboard support dual-core processors?

Hi there! I'm very confused about my motherboard (ConRoe945PL-GLAN) It's manual says, that i can use only some kind of ConRoe processors. But some pages on internet says that i can plug in almost ...
6
votes
2answers
4k views

How does the CPU write infomation to ram?

My question is, how does the CPU write data to ram? From what I understand, modern CPU's use different levels of cache to speed up ram access. The RAM gets a command for information and then sends a ...
13
votes
6answers
6k views

What are “Instructions per Cycle”?

I've been learning a little bit more about how processors work, but I haven't been able to find a straight answer about instructions per cycle. For instance, I was under the impression that a four ...
9
votes
3answers
1k views

How does xeon differ from regular processors?

Yes I know that Xeons are meant for server use, require different motherboards and you can have more than one of them in a box. But technically how is a Xeon processor itself different from a regular ...