CPU Architecture refers to a collection of parameters about the design of CPU realized by its manufacturer, such as: its bit-ness or data bus width (16, 32, 64 bits) , Instruction Set (RISC, CISC,...), Memory Management, Threading, Virtualization support, etc

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Do emulators parse binary code within files?

I have seen some emulators that claim they execute, and even though they do, their source code shows they don't directly parse every 1 and 0 to determine an instruction. My question is, if the ...
2
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2answers
541 views

Why CPU emulation is slow [closed]

Different CPU (IA-32, ARM9 etc.) operations should be equivalent in their nature (move, read, write data etc.). It shouldn't be that painful for different CPUs to emulate each other. But seems like it'...
3
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1answer
4k views

Why do we need multiple levels of cache memory?

In general a cache memory is useful because the speed of the processor is higher than the speed of the ram (they are both increasing in speed but the difference still remains). So reducing the number ...
6
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3answers
3k views

What's the difference between a hardware register and a memory-mapped register?

This has been puzzling, so I'll lay it all out here. Apparently, through MMIO, you can access external devices using a certain memory-mapped address, which would then be re-routed to that device ...
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1answer
221 views

When modern computers boot, what initial setup of RAM do they execute, and how does it exactly work?

I know the title reeks of confusion, and some of you might assume I am just wondering about how the computer boots in general, but I'm not. But I'll sort this out for you people now: 1.Onboard ...
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1answer
184 views

Which enhanced instruction set does an application use?

Is there any reliable and easy way to establish whether an exe or dll uses a particular enhanced instruction set (e.g. SSE4.1)? Disassembling it with ndiasm seems to produce a listing which you could ...
3
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1answer
468 views

How interrupts and privilege levels work?

I'm trying to get a better understanding of how interrupts work (both hardware and software) and the privileges that go with them. If we use the NIC as an example. When the OS creates the IDT, does ...
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1answer
18k views

Why is SRAM faster than DRAM?

In modern multi-core processors, the processor caches (L1,L2 and L3) are made up of SRAM with decreasing speeds(L2 caches are higher speed SRAM than L3 caches which is a cost trade-off). The main ...
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1answer
2k views

Is it possible for an x86 processor to match an ARM processor in terms of performance per watt?

From my personal experience with my tablet, and from the benchmarks and articles I've read, it always seems ARM processors, as seen in virtually all mobile devices, deliver incredible performance for ...
5
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3answers
714 views

Does a hotter processor run faster?

I heard from a physicist that when silicon gets hotter it can conduct more electricity through it. He said: "Silicon is going to have a pretty good structure, it's going to have higher melting ...
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2answers
913 views

Using 32bit application in 64bit

I am using windows 32 bit VLC media player in 64 bit pc. It is working fine. but my question is that won't it allocate memory according to 32 bit structure? That means though i have 64 bit PC, i ...
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2answers
70 views

Will this combination of hardware work together? [closed]

I'm assembling a system with Motherboard: Intel DH61HO Processor: Intel Core i3 2105 Ram: Corsair DDR3 4GB DDR3-1333 Hard drive: ST500DM002 (500 GB, 7200 RPM) Is this combination compatible, or am ...
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9answers
14k views

Why have CPU manufacturers stopped increasing the clock speeds of their processors? [closed]

I have read that manufacturers stopped concentrating on higher clock speeds and are now working on other things to improve performance. With an old Desktop machine with Intel® Xeon® Processor E3110 ...
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1answer
5k views

Confusion with terms -> FSB, QPI, HT, DMI, UMI

I'm a bit confused about some terms used by CPU manufacturers. I know that FSB is a bus that connect the CPU to the Northbridge and that QPI (Intel) and HT (AMD) replaced this technology. The new ...
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1answer
103 views

x86 OS vs x86_64 OS and battery for laptop with an intel i5 [closed]

I recently purchased a new laptop with an Intel i5 and 6 Gigs memory for general usage. I'll have the time to install it this weekend and I'm wondering whether installing an x86 instead of an x86_64 ...
3
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1answer
7k views

How many registers does Intel® Core™ i7-3770T Processor have?

I've been looking at this website: http://ark.intel.com/products/65525/Intel-Core-i7-3770T-Processor-8M-Cache-up-to-3_70-GHz But I can't figure out the number of registers.
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5answers
206 views

Are there CPUs with true shared memory? [closed]

I work on parallel algorithms and want to validate certain theoretic claims by runtime experiments. As it turns out, most (?) modern multicore CPUs use NUMA which inherently breaks many models to the ...
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3answers
2k views

where does Kernel reside on a multi-core system

Suppose I have a multi-core system, say 4 cores, and in this I pin 3 user process to a 3 CPU's. In such a case, where will the kernel reside? Suppose one of the user process make a system call, or ...
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3answers
2k views

Why are newer generations of processors faster at the same clock speed?

Why, for example, would a 2.66 GHz dual-core Core i5 be faster than a 2.66 GHz Core 2 Duo, which is also dual-core? Is this because of newer instructions that can process information in fewer clock ...
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1answer
173 views

When a thread is created, how is the initial context determined? [closed]

How is a thread's initial context (registers state) determined on thread creation? For example: Current thread context eax=0x4, ebx=0x9000, ecx=0xfff, etc... Create a thread is called to begin ...
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2answers
88 views

Instruction assignment with multiple CPUs

Maybe this is a stupid question but I am trying to gain a better understanding of hardware inner workings... If a machine has two or more CPUs, which hardware component is actually responsible for ...
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2answers
6k views

CPU and Motherboard clock speeds

I have been doing some reading about CPU clock speeds and how CPU clock speeds are calculated. After reading several articles, I have come to the understanding that your CPU clock speed is determined ...
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4answers
5k views

How can I find a list of all SSE instructions? What happens if a CPU doesn't support SSE?

So I've been reading about how processors work. Now I'm on the instructions (SSE, SSE2, etc) stuff. (Which is pretty interesting). I have lot of questions (I've been reading this stuff on Wikipedia): ...
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0answers
1k views

Using UEFI to access CPU features which are locked in BIOS

I have Dell Latitude E6420 with SandyBridge i5-2520M and standard issue Dell BIOS (version A15). In certain situations computer produces annoying high-pitched noise (it is not loud but it is ...
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1answer
110 views

Requirements to change a 32-bit CPU with a 64-bit CPU [closed]

I want change my 32-bit Athlon with a 64-bit Phenom. Do I need to change my OS (32-bit Windows 7) as well?
0
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1answer
2k views

Is little-endian still faster on Intel processors or it does not matter if I parse big-endian on intel? [closed]

It used to be in past architectures. Is it still the case? I am reading from the network into byte buffers in Java. Basically, will read bytes on Intel using big-endian instead of little-endian ...
0
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1answer
549 views

Core i3 3220 for gaming [closed]

Since the Core i3 3220 has Hyper-Threading, will games like Battlefield 3 see and use the CPU as a virtual "quad core" rather than just 2 physical cores, so that AI and other features in the game run ...
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3answers
1k views

Direct Memory Access(DMA) controllers for intel

Does intel in it's current generation of processors provide any Direct Memory Access(DMA) controllers? If yes is it built into the chip? http://en.wikipedia.org/wiki/Direct_memory_access
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1answer
1k views

Understanding the nop byte(s)

Ok, so I was reading through the AMD64 manuels and knowing that nop is really an xchg eax, eax, I looked at the xchg and found something interesting, that it seems a byte can be encoded into the ...
2
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1answer
564 views

“nop; jmp short” vs. “jmp short; nop”

Ok, first let me get this straight: This is not about micro optimization. But, I know in bootloaders on the partition, a lot use the jmp short; nop coding. But it is to my understanding that the less ...
2
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3answers
327 views

Hardware. What is the difference between a port and a bank?

Especially, these days, the distinction between them is very confusing.. For example, NVidia's shared memory is 32-banked, so what they say is in one cycle, 32 data can come out at the same time... ...
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1answer
108 views

how to make caches with equal bitline and wordline lengths?

We know to minimize delay of cache structures in microprocessors, the bitline wire length and wordline wire length should be relatively the same. So in other words, cache modules in processors should ...
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3answers
108 views

How to count the approximate number of Intel-compatible binaries/programs on a computer running OS X Lion, and time that count?

For an approximate count — and to get an idea of the time taken to count — I began with a multi-line command that could run in tcsh. I'm not a plumbing expert, so I invite answers that are better ...
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2answers
13k views

What`s the difference between Intel 64 and AMD64?

Can someone explain if there is any difference between the intel64 and amd64 architectures?
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1answer
3k views

VMWare on Intel i7-2600[S/K]: VM processor configuration for maximum performance

I have an Intel i7-2600K-processor, which has 4 cores but runs 8 thread because of Hyperthreading. I want to run a Ubuntu-VM with maximum performance under VMWare 8 (host system is Windows 7, and is ...
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1answer
163 views

i7-9XX vs i7-2XXX

It seems that the "older?" i7-9XX series processors are still quite common in new systems. Is there an advantage to these CPUs over the newer Sandy Bridge i7-2XXX series that is making them preferable?...
11
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3answers
765 views

Will a new processor with slower clockspeed run legacy applications faster?

I'm using Linux and have an old P4 with about 3 GHz clock speed. Will a newer chip that had slower clock speed run my legacy applications faster or slower? I only use one application at a time, an ...
7
votes
4answers
2k views

Does the 6502 put FF in the stack pointer register as soon as it gets power for the first time?

I'm reading about the 6502 processor's instruction set from the many links at 6502.org, and one tutorial states: The stack pointer (S) points to a byte on Page 1, that is, to a byte whose address ...
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3answers
11k views

Why can't Windows 7 be installed on a ARM processor based system?

Today I was reading some news(1, 2, 3, 4) about Microsoft Windows 8 and saw that one of the new features is that it can run over a ARM processor based system. This make me wondering the reasons that ...
6
votes
3answers
8k views

What do the terms “asynchronous” and “synchronous” mean, with respect to the definition of an interrupt?

Quoted from http://en.wikipedia.org/wiki/Interrupt: an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change ...
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6answers
57k views

What's the main difference between Intel processor generations?

What are the main differences between each processor generation of Intel processors/chipsets? Is there a performance difference? I've already seen processors from first to sixth generation, however I ...
5
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1answer
630 views

Intel's AES-NI performance: Isn't the hard drive the bottleneck?

Will I see a performance gain with AES-NI using dm-crypt/LUKS for hard drive system encryption? Isn't the hard drive the bottleneck even without hardware acceleration?
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3answers
198 views

how to find machine architecture and OS capability

When I run command 'uname-a' on my linux machine ...the result is 'i686' . My OS is Fedora14 . what does that i686 means ? is it 64bit architecture of CPU , or does it indicates my OS capability (...
2
votes
2answers
216 views

What's the difference between the graphics capabilities in Sandy Bridge and an accelerated graphics card? [closed]

I've been reading that the big news with Sandy Bridge processors is that they can process video much faster. Does this mean that we no longer need accelerated graphics cards that can do this? Are we ...
3
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3answers
792 views

“Processor register” and “IO register”

I was wondering if processor registers and IO registers are the same concept? Are they registers in CPU or in some IO devices? I picked up IO registers from this Super User question.
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6answers
25k views

How does a CPU 'know' what commands and instructions actually mean?

How does a processor 'know' what the different commands mean? I'm thinking of assembly level commands like MOV, PUSH, CALL, etc...
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3answers
10k views

What is the meaning of dual core vs. dual cpus?

What is the difference between multiple CPU processors (ie: Pentium D) and multicore processors (ie: Core 2 duo)?
2
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0answers
224 views

How to tell if an EXE is 32-bit or 64-bit? [duplicate]

Possible Duplicate: Quick way to tell if an installed application is 64-bit or 32-bit What's the easiest way to know if a Windows EXE is 32-bit or 64-bit?
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2answers
273 views

64 bit Operating System?

What we are getting if someone says "my machine is 64-bit computer" . What is the difference between 64-bit computer (I mean the CPU architecture) and operating system (Windows 64-bit OS). Please ...
3
votes
3answers
210 views

How is bit number of register determined?

Is it true registers are 32-bit in x86 and 64-bit in x86-64?