CPU Architecture refers to a collection of parameters about the design of CPU realized by its manufacturer, such as: its bit-ness or data bus width (16, 32, 64 bits) , Instruction Set (RISC, CISC,...), Memory Management, Threading, Virtualization support, etc

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Why are newer generations of processors faster at the same clock speed?

Why, for example, would a 2.66 GHz dual-core Core i5 be faster than a 2.66 GHz Core 2 Duo, which is also dual-core? Is this because of newer instructions that can process information in fewer clock ...
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hardinfo cpu processor information

I have run hardinfo and generated a report and I am puzzled to see the processors. The report says that the computer has 4 i3 processors, but at the same time 3 of the 4 show to be running at 800 MHz (...
9
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1answer
742 views

Does a CPU clock frequency vary on-demand?

On my machine (not a personal computer), I have 4 cores (2.4GHz) and I currently don't have any important process running. Right now, are all of my 4 cores running/vibrating at 2.4GHz or are some of ...
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39 views

Understanding cpu usage

I have this simple code int main() { while (1){} return 0; } When I run this code on Windows, why is my cpu usage only 25%? Yet, when I run it on Linux, my cpu usage is 100% I have 4 cores ...
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1answer
54 views

Are cores in a CPU package always identical?

By identical, I mean having the same signature - family, model, stepping and brand string of the CPU (which essentially identifies a CPU model uniquely) If I'm not wrong, a CPU package goes into a ...
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0answers
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operations process in a computer

Is it true that all high-level operations in a computer (say, copying, pasting, web surfing, running apps etc) are all finally converted to micro-operations (say, arithmetic, logical and shift) and ...
2
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0answers
78 views

Reading CPU model specific registers on linux

I am running Ubuntu 15.10 but testes it also on Debian. I have Intel i5-5675C processor. I am using msr-tools-1.3 to do it. I am able to read register 0x00001a2 with the following command: rdmsr ...
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13k views

What`s the difference between Intel 64 and AMD64?

Can someone explain if there is any difference between the intel64 and amd64 architectures?
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4answers
5k views

How can I find a list of all SSE instructions? What happens if a CPU doesn't support SSE?

So I've been reading about how processors work. Now I'm on the instructions (SSE, SSE2, etc) stuff. (Which is pretty interesting). I have lot of questions (I've been reading this stuff on Wikipedia): ...
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2answers
80 views

Definition of a processor vs core (multiprocessor vs multicore)

After reading alot of links, it bothers me that there is so much overlap between simple definitions such as CPU, processor, core, etc. http://stackoverflow.com/questions/19225859/difference-between-...
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1answer
3k views

VMWare on Intel i7-2600[S/K]: VM processor configuration for maximum performance

I have an Intel i7-2600K-processor, which has 4 cores but runs 8 thread because of Hyperthreading. I want to run a Ubuntu-VM with maximum performance under VMWare 8 (host system is Windows 7, and is ...
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1answer
19 views

The main difference between Superscalar and Parallelism

In superscalar processing, more than one instruction is executed in parallel at each core, so how would that differ from parallel processing then? Thank you.
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22 views

Register allocation tables overwrite

Reading about the Xeon processor: the Xeon has two register allocation tables (RATs), each of which handles the mapping of one logical processor's eight architectural integer registers and eight ...
189
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19answers
39k views

32-bit vs. 64-bit systems

What are the differences between 32-bit and 64-bit systems? If you have used both of them, what kind of sharp differences have you experienced? Would it be a problem to use 32-bit programs on 64-...
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2answers
291 views

Difference between a read and load

What is the major difference between read and load and write and store? I know it is a very basic question, but somehow I'm not able to get it.
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0answers
23 views

What debian architecture do I need to download

I'm running a server with a i5 4440 CPU. Now according to the FAQ I thought I need to download the i386 version. Now I searched the internet and found some topics and some friends are telling me I ...
0
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0answers
26 views

Why does 'lshw' tell me “32 bits”?

I ran lshw from a LiveUSB, but I'm not entirely clear how to understand one part of the output. In the first part, it says width: 32 bits, but just a few lines down in the CPU details it says width: ...
3
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1answer
43 views

Conflicting answers regarding system compability + refurbished laptop + 32/64 bit

I've used SecurAble, system information and Regedit process to determine if I can install a 64-bit OS with my current configuration. SecurAble says it's expandable, but the other two say it's a x86 ...
3
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1answer
4k views

Why do we need multiple levels of cache memory?

In general a cache memory is useful because the speed of the processor is higher than the speed of the ram (they are both increasing in speed but the difference still remains). So reducing the number ...
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5answers
205 views

Are there CPUs with true shared memory? [closed]

I work on parallel algorithms and want to validate certain theoretic claims by runtime experiments. As it turns out, most (?) modern multicore CPUs use NUMA which inherently breaks many models to the ...
0
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1answer
55 views

which one of these units is not located in the microprocessor?

I'm doing a test on general computer science and I think the answer sheet is wrong. The question is as follows: which one of these units is not located in the microprocessor? 1) Cache ...
0
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1answer
108 views

how to make caches with equal bitline and wordline lengths?

We know to minimize delay of cache structures in microprocessors, the bitline wire length and wordline wire length should be relatively the same. So in other words, cache modules in processors should ...
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1answer
17k views

Why is SRAM faster than DRAM?

In modern multi-core processors, the processor caches (L1,L2 and L3) are made up of SRAM with decreasing speeds(L2 caches are higher speed SRAM than L3 caches which is a cost trade-off). The main ...
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0answers
311 views

How many bits are in the address field for a directly mapped cache?

Here is the problem I am working on: The Problem: " A high speed workstation has 64 bit words and 64 bit addresses with address resolution at the byte level. Assuming a direct mapped cache with 8192 ...
3
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1answer
7k views

How many registers does Intel® Core™ i7-3770T Processor have?

I've been looking at this website: http://ark.intel.com/products/65525/Intel-Core-i7-3770T-Processor-8M-Cache-up-to-3_70-GHz But I can't figure out the number of registers.
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13answers
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Why doesn't “add more cores” face the same physical limitations as “make the CPU faster”?

In 2014, I hear a lot of programming languages touted for their concurrency features. Concurrency is said to be crucial for performance gains. In making this statement, many people point back to a ...
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1answer
114 views

Does my processor support PAE?

I currently have the following system specifications: Windows 7 64-Bit Athlon 64 X2 (W) 4600+ 2.4 GHz 8GB of RAM 500 GB HD I'm planning on installing Xubuntu as a dual partition along side my ...
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2answers
305 views

Windows 8.1 32bit version upgrade to Windows 10 64bit version

I have a windows 8.1 32bit installation with 4GB of RAM and a x64 capable CPU. I've upgraded the RAM to 8GB and want to do the Windows 10 upgrade... as far as I'm aware the upgrade will do a like for ...
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2answers
6k views

CPU and Motherboard clock speeds

I have been doing some reading about CPU clock speeds and how CPU clock speeds are calculated. After reading several articles, I have come to the understanding that your CPU clock speed is determined ...
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3answers
424 views

Why multi core processors producing less heat

We are using multi core processors partially, because the waste heat of single core processors was to high to handle. (correct?) Now we are using multi core processors that create less heat and need ...
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1answer
343 views

CPU Upgrade: Pentium P6100 to i7 640M? [closed]

I have been using the Compaq CQ-62 358TU for a while now, and has treated me well, but needed a long sought after upgrade, (since I'm broke and would rather upgrade than buy a new computer). My plan ...
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2answers
91 views

Why did the system repair guy leave this two wires out like this?

Why system repair guy leave this two wires out like this? Will it cause problem in future?
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2answers
200 views

Do emulators parse binary code within files?

I have seen some emulators that claim they execute, and even though they do, their source code shows they don't directly parse every 1 and 0 to determine an instruction. My question is, if the ...
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2answers
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Instruction assignment with multiple CPUs

Maybe this is a stupid question but I am trying to gain a better understanding of hardware inner workings... If a machine has two or more CPUs, which hardware component is actually responsible for ...
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0answers
59 views

Is there a pentium equivalent of any i-series processor?

I have a confusion with speed of processors and I want to know what makes say, i3 faster than pentium processor which pentium doesn't have? If we add more GHz to pentium will it be same as i3 in some ...
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3answers
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What's the difference between a hardware register and a memory-mapped register?

This has been puzzling, so I'll lay it all out here. Apparently, through MMIO, you can access external devices using a certain memory-mapped address, which would then be re-routed to that device ...
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1answer
847 views

What are functional unit and control logic of a cpu?

From the book Modern Operating systems; The abundance of transistors on a single chip is leading to a problem: what to do with all of them? We saw one approach above: superscalar ...
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2answers
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RAM Limitation on 64 bit arch

I see that there are a lot of places mentioning 16 EB RAM limitation... However, isn't a modern register 64 bit? and if so, 2^64 should point to the number of registers possible and since they are ...
2
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3answers
327 views

Hardware. What is the difference between a port and a bank?

Especially, these days, the distinction between them is very confusing.. For example, NVidia's shared memory is 32-banked, so what they say is in one cycle, 32 data can come out at the same time... ...
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3answers
1k views

Direct Memory Access(DMA) controllers for intel

Does intel in it's current generation of processors provide any Direct Memory Access(DMA) controllers? If yes is it built into the chip? http://en.wikipedia.org/wiki/Direct_memory_access
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CISC and VLIW, and instruction and opcode

From http://en.wikipedia.org/wiki/Instruction_set CISC processors include "complex" instructions in their instruction set. A single "complex" instruction does something that may take many ...
0
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2answers
179 views

Why is it said that 'The longer the pipeline, higher the processor clock rate' [duplicate]

I have been recently going through the hyper threading technology of Pentium 4. The number of pipeline stages is high in P4 and is said that it will increase the speed of clock rate. How is that ...
2
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2answers
247 views

What does “address resolution at the byte level” mean?

Here is the problem I am working on The Problem :A high speed workstation has 64 bit words and 64 bit addresses with address resolution at the byte level. How many words can in be in the address ...
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1answer
206 views

How many words can be in the address space?

Here is the problem I am working on The Problem: A high speed workstation has 64 bit words and 64 bit addresses with address resolution at the byte level. How many words can in be in the address ...
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1answer
6k views

Is the amount of NUMA nodes always equal to sockets?

I have used lscpu to check two servers configuration: [root@localhost ~]# lscpu Architecture: x86_64 ...... Core(s) per socket: 1 Socket(s): 1 NUMA node(s): 1 ...
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2answers
369 views

If a 32 bit CPU has a 64bit bus system, is it 64 bit or 32 bit?

Let's say the internal registers of a CPU are 32 bits wide. But the CPU has a 64 bit system bus and the two separate pipelines are receiving information simultaneously, is it considered a 32bit ...
0
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0answers
37 views

Why is Pentium 4 Prescott slow compared to Pentium M? [duplicate]

I was benchmarking if it is worth to put loop inside a callback function so I tested fourth order Runge-Kutta of on y'=y in C++, all with gcc 5.1 on Ubuntu with compilation command g++ -std=c++11 -O3 ...
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0answers
69 views

Do virtual machines not allow all host CPU extensions?

For convenience's sake I'm trying to run an otherwise "regular" installation of Gentoo Linux as a guest inside VirtualBox on a Windows 7 host. I bootstrapped the installation by using VirtualBox, even....
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2answers
96 views

How does a CPU decide which transistors to use? [closed]

Perhaps I'm not thinking about this correctly, but when you give the CPU a command such as Multiply Registers (MR) R2,R4 how does it decide which logic gates it will use, is it just the first gates ...
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1answer
86 views

Where is the CPUID string located in the CPU?

I'm a newbie to CPU architectures and design, I came up with the following question: Where is the CPUID string (like "GenuineIntel") stored? Is it hard-coded in the microcode ROM? Or is CPUID a low-...