Questions tagged [cpu-architecture]

CPU Architecture refers to a collection of parameters about the design of CPU realized by its manufacturer, such as: its bit-ness or data bus width (16, 32, 64 bits) , Instruction Set (RISC, CISC,...), Memory Management, Threading, Virtualization support, etc

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32-bit vs. 64-bit systems

What are the differences between 32-bit and 64-bit systems? If you have used both of them, what kind of sharp differences have you experienced? Would it be a problem to use 32-bit programs on 64-...
Mehper C. Palavuzlar's user avatar
114 votes
13 answers
23k views

Why doesn't "add more cores" face the same physical limitations as "make the CPU faster"?

In 2014, I hear a lot of programming languages touted for their concurrency features. Concurrency is said to be crucial for performance gains. In making this statement, many people point back to a ...
Nathan Long's user avatar
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Why do we have CPUs with all the cores at the same speeds and not combinations of different speeds?

In general if you are buying a new computer you would determine which processor to buy by what your expected workload will be. Performance in games tends to be determined by single core speed, whereas ...
Jamie's user avatar
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76 votes
6 answers
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How does a CPU 'know' what commands and instructions actually mean?

How does a processor 'know' what the different commands mean? I'm thinking of assembly level commands like MOV, PUSH, CALL, etc...
Simon Verbeke's user avatar
66 votes
9 answers
22k views

Why have CPU manufacturers stopped increasing the clock speeds of their processors? [closed]

I have read that manufacturers stopped concentrating on higher clock speeds and are now working on other things to improve performance. With an old Desktop machine with Intel® Xeon® Processor E3110 ...
learner's user avatar
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44 votes
5 answers
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Why are newer generations of processors faster at the same clock speed?

Why, for example, would a 2.66 GHz dual-core Core i5 be faster than a 2.66 GHz Core 2 Duo, which is also dual-core? Is this because of newer instructions that can process information in fewer clock ...
agz's user avatar
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39 votes
2 answers
51k views

What`s the difference between Intel 64 and AMD64?

Can someone explain if there is any difference between the intel64 and amd64 architectures?
Mayhem's user avatar
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37 votes
9 answers
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How can I enable PAE on Windows 7 (32-bit) to support more than 3.5 GB of RAM?

I know that Windows XP 32-bit can be configured, through PAE, to support more than 3.5 GB of RAM. Is there a good tutorial to do this with Windows 7 32-bit? As to why I don't simply use 64-bit ...
Niphoet's user avatar
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34 votes
12 answers
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Why are most of the common processors' bit counts powers of 2?

Most of the processors/CPUs widely used today, have a bit count that is a power of 2 (usually 32 and 64, but also 16, 8, and 4 bits). Even though the meaning of bit count isn't consistent (some say it'...
SamFF's user avatar
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33 votes
3 answers
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What are performance and efficiency cores in Intel's 12th Generation Alder lake CPU Line?

I watched Intel's Architecture Day 2021 released in August 2021 (last month at the time of writing this). After watching Intel's video about their new CPU, I was — quite honestly — a bit confused. I ...
JΛYDΞV's user avatar
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30 votes
10 answers
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How can I determine if the current version of Windows is either 32-bit or 64-bit from the command line? [duplicate]

What's the command line to find out if the OS is running a 32-bit version or 64-bit of Windows?
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25 votes
3 answers
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Is the amount of NUMA nodes always equal to sockets?

I have used lscpu to check two servers configuration: [root@localhost ~]# lscpu Architecture: x86_64 ...... Core(s) per socket: 1 Socket(s): 1 NUMA node(s): 1 ...
Nan Xiao's user avatar
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19 votes
7 answers
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Why does the heat production increase as the clockrate of a CPU increases?

The whole multi-core debate got me thinking. It's much easier to produce two cores (in one package) then speeding up one core by a factor of two. Why exactly is this? I googled a bit, but found ...
Nils's user avatar
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2 answers
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Are 64-bit processors "faster" than 32-bit ones, simply because they are 64-bits? [duplicate]

I have pondered that some say "32-bit is old news" because you are limited in RAM without cutting around, such as with PAE. Assuming first that the following factors weigh in on the processor's speed ...
user avatar
18 votes
6 answers
105k views

What's the main difference between Intel processor generations?

What are the main differences between each processor generation of Intel processors/chipsets? Is there a performance difference? I've already seen processors from first to sixth generation, however I ...
Diogo's user avatar
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18 votes
2 answers
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Definition of a processor vs core (multiprocessor vs multicore)

After reading alot of links, it bothers me that there is so much overlap between simple definitions such as CPU, processor, core, etc. https://stackoverflow.com/questions/19225859/difference-between-...
AlanSTACK's user avatar
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16 votes
1 answer
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Why is SRAM faster than DRAM?

In modern multi-core processors, the processor caches (L1,L2 and L3) are made up of SRAM with decreasing speeds(L2 caches are higher speed SRAM than L3 caches which is a cost trade-off). The main ...
Geek's user avatar
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15 votes
2 answers
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Linux : Understanding load average and % CPU?

When I execute top command on my ubuntu system I see below results top - 07:58:58 up 1:21, 1 user, load average: 0.82, 0.73, 0.55 Tasks: 293 total, 1 running, 292 sleeping, 0 stopped, 0 ...
user3198603's user avatar
14 votes
3 answers
22k views

Why can't Windows 7 be installed on a ARM processor based system?

Today I was reading some news(1, 2, 3, 4) about Microsoft Windows 8 and saw that one of the new features is that it can run over a ARM processor based system. This make me wondering the reasons that ...
Diogo's user avatar
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where does Kernel reside on a multi-core system

Suppose I have a multi-core system, say 4 cores, and in this I pin 3 user process to a 3 CPU's. In such a case, where will the kernel reside? Suppose one of the user process make a system call, or ...
Varun Kulkarni's user avatar
12 votes
3 answers
6k views

Why Hyper-Threading provides 2 virtual cores but not more?

Here is an explanation of Hyper-Threading found on Wikipedia: For each processor core that is physically present, the operating system addresses two virtual (logical) cores and shares the workload ...
A.L's user avatar
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12 votes
4 answers
8k views

Does the 6502 put FF in the stack pointer register as soon as it gets power for the first time?

I'm reading about the 6502 processor's instruction set from the many links at 6502.org, and one tutorial states: The stack pointer (S) points to a byte on Page 1, that is, to a byte whose address ...
mring's user avatar
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11 votes
3 answers
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Will a new processor with slower clockspeed run legacy applications faster?

I'm using Linux and have an old P4 with about 3 GHz clock speed. Will a newer chip that had slower clock speed run my legacy applications faster or slower? I only use one application at a time, an ...
user114558's user avatar
11 votes
1 answer
4k views

Does a CPU clock frequency vary on-demand?

On my machine (not a personal computer), I have 4 cores (2.4GHz) and I currently don't have any important process running. Right now, are all of my 4 cores running/vibrating at 2.4GHz or are some of ...
Remi.b's user avatar
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11 votes
3 answers
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What's the difference between a hardware register and a memory-mapped register?

This has been puzzling, so I'll lay it all out here. Apparently, through MMIO, you can access external devices using a certain memory-mapped address, which would then be re-routed to that device ...
user avatar
10 votes
4 answers
19k views

Is my i7 920 Intel processor considered ia64 or x64?

Is my i7 920 Intel processor considered ia64 or x64?
user3183's user avatar
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1 answer
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Confusion with terms -> FSB, QPI, HT, DMI, UMI

I'm a bit confused about some terms used by CPU manufacturers. I know that FSB is a bus that connect the CPU to the Northbridge and that QPI (Intel) and HT (AMD) replaced this technology. The new ...
user1301037's user avatar
9 votes
4 answers
20k views

What do the terms "asynchronous" and "synchronous" mean, with respect to the definition of an interrupt?

Quoted from http://en.wikipedia.org/wiki/Interrupt: an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change ...
Tim's user avatar
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X86 Address Space Controller?

I understand that on x86, certain ranges of physical memory addresses are mapped to the BIOS, others to RAM and yet others to I/O devices. I would like to know which hardware component is ...
artificer's user avatar
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8 votes
1 answer
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Is it possible for an x86 processor to match an ARM processor in terms of performance per watt?

From my personal experience with my tablet, and from the benchmarks and articles I've read, it always seems ARM processors, as seen in virtually all mobile devices, deliver incredible performance for ...
bwDraco's user avatar
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8 votes
2 answers
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What's the difference between a superscalar and a vector processor?

They both can process multiple instructions in the same time, but I suppose there is a fundamental difference which explains why there are two names and we haven't just switched to using superscalar ...
Luke's user avatar
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7 votes
9 answers
8k views

Where does the "2" in 2^n come from when computing max memory size? n=n-bit

So I was reading up on address buses and max memory sizes, so my question is, when computing max memory size for any architecture, where does the 2 in 2^n where n is the address bus bit size come from?...
Sam Pan's user avatar
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7 votes
1 answer
10k views

Change CPU MHz from Registry

Is this safe? I was interested about the CPU so I did a little digging and found this location Computer\HKEY_LOCAL_MACHINE\HARDWARE\DESCRIPTION\System\CentralProcessor\0 ~MHz shows your MHz in ...
Ryan Smith's user avatar
7 votes
4 answers
8k views

How can I find a list of all SSE instructions? What happens if a CPU doesn't support SSE?

So I've been reading about how processors work. Now I'm on the instructions (SSE, SSE2, etc) stuff. (Which is pretty interesting). I have lot of questions (I've been reading this stuff on Wikipedia): ...
Blastcore's user avatar
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7 votes
1 answer
136 views

How do general binaries take advantage from new instructionsets on new CPUs

With every release of a new processor, there are changes to the instructionset the processor supports. For example, Haswell has Advanced Vector Extensions. However, when I run a program on a PC with a ...
Martijn's user avatar
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6 votes
4 answers
7k views

How to make a 32-bit program from a 64-bit version?

Many software only supports 64-bit machine because the market for 32-bit is small now. However, for those who are stuck with 32-bit machines, this means newer versions cannot be installed, and this ...
Ooker's user avatar
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6 votes
1 answer
19k views

Why do we need multiple levels of cache memory?

In general a cache memory is useful because the speed of the processor is higher than the speed of the ram (they are both increasing in speed but the difference still remains). So reducing the number ...
Kami's user avatar
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6 votes
1 answer
2k views

How is the micro-op cache tagged?

According to Real World Technologies’ article on “Intel’s Sandy Bridge Microarchitecture”: “Sandy Bridge’s uop cache is organized into 32 sets and 8 ways, with 6 uops per line, for a total of 1.5K ...
Lewis Kelsey's user avatar
5 votes
3 answers
13k views

What is the meaning of dual core vs. dual cpus?

What is the difference between multiple CPU processors (ie: Pentium D) and multicore processors (ie: Core 2 duo)?
sumeyye's user avatar
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5 votes
3 answers
6k views

Direct Memory Access(DMA) controllers for intel

Does intel in it's current generation of processors provide any Direct Memory Access(DMA) controllers? If yes is it built into the chip? http://en.wikipedia.org/wiki/Direct_memory_access
eeuser's user avatar
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5 votes
2 answers
1k views

32-bit to 64-bit skipping 48-bit?

Computer architecture upgraded from 16-bit to 32-bit to 64-bit. What was the logic for skipping 48-bit? What reasoning was used to upgrade to 64-bit and not some other exponent? The following tables ...
Matias Casado's user avatar
5 votes
1 answer
3k views

Is there any existing CPU implementation which uses one's complement?

Programming languages like Ada or VHDL define an integer datatype as -2^31+1 to 2^31-1. This rule goes back to CPUs with an one's complement ALU. It allows the program to run on one's and two's ...
Paebbels's user avatar
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5 votes
1 answer
1k views

Intel's AES-NI performance: Isn't the hard drive the bottleneck?

Will I see a performance gain with AES-NI using dm-crypt/LUKS for hard drive system encryption? Isn't the hard drive the bottleneck even without hardware acceleration?
Mark K.'s user avatar
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5 votes
2 answers
20k views

GPU cores vs. CPU cores

A (say NVidia) GPU is made of streaming multiprocessors consisting of arrays of streaming processors or CUDA core. There are 5120 CUDA cores on V100. A general purpose (say Intel) CPU has "only" up to ...
kiriloff's user avatar
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5 votes
3 answers
2k views

Does a hotter processor run faster?

I heard from a physicist that when silicon gets hotter it can conduct more electricity through it. He said: "Silicon is going to have a pretty good structure, it's going to have higher melting ...
Gavin's user avatar
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5 votes
1 answer
2k views

Does TSX-NI provide an advantage when running virtual machines? [closed]

My question is about CPU architecture and the instruction set extension TSX-NI. For which usage scenario is it useful, and especially is it useful for web development or running virtual machines and ...
ihmels's user avatar
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5 votes
1 answer
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How many registers does Intel® Core™ i7-3770T Processor have?

I've been looking at this website: http://ark.intel.com/products/65525/Intel-Core-i7-3770T-Processor-8M-Cache-up-to-3_70-GHz But I can't figure out the number of registers.
disanti's user avatar
  • 61
5 votes
3 answers
4k views

Do process switch between different cores?

Will a process switch between different cores to increase performance? If the process does jump between cores, which components are shared across cores? L1-L3 cache, registers or memory?
FunctionBlock's user avatar
4 votes
2 answers
9k views

Difference between a read and load

What is the major difference between read and load and write and store? I know it is a very basic question, but somehow I'm not able to get it.
Ankur Bhatia's user avatar
4 votes
1 answer
17k views

CPU and Motherboard clock speeds

I have been doing some reading about CPU clock speeds and how CPU clock speeds are calculated. After reading several articles, I have come to the understanding that your CPU clock speed is determined ...
NZHammer's user avatar