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My understanding is that the motherboard controller will handle mapping the virtual memory locations to the physical address of the RAM. As triple-channel memory works, and as most motherboard controllers work, both CPUs will work together to map the lower 4gb of RAM spaced equally along the first three RAM modules (filling up the first three sets of 3gb, ...


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Last question first: Yes, Vista does support NUMA (XP professional already did) In most cases it is beneficial to use the hardwares' native memory mode. 'Optimal' memory bandwidth and latentcy is the result. The modes access policies can be descibed as follows: NUMA: use local memory first (fast), if full use foreign (slow) SMP: map every other memory ...


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If you would like to learn in detail then, "Parallel Computer Architecture: A Hardware/Software Approach" book is authoritative guide to this subject. Also you would find slides at this site quite useful. (Lec 8-10)


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I would have a look through docs.sun.com for documentation for the UltraSPARC CPU as well as some of their bigger systems. They've been dealing with issues like this for a long, long time, and their documentation is usually excellent. Here's a good place to start: http://www.google.com/search?q=cache+coherence+site:docs.sun.com Full disclosure: I used to ...



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