PCI-Express (Peripheral Component Interconnect Express), formerly known as 3GIO and officially abbreviated as PCIe, is a high-speed expansion bus standard developed to replace older standards such as PCI, PCI-X and AGP.
- PCI was a shared, parallel bus connected to a PCI host. This architecture proved to be slow for GPUs in time, and a replacement need was born. On the other hand, PCIe uses dedicated lanes connecting the peripheral to the motherboard chipset with serial lanes without sharing data lanes with other PCIe buses.
- PCI and other expansion slots used parallel communications while PCIe uses high-speed serial connection.
- The individual lanes can be grouped together to achieve higher-bandwidth connections. The 'x' following the PCIe specifies the number of lanes, e.g. x1, x4, x8, x16.
The standards of the PCIe, as has been for other expansions, is determined the PCI-SIG (PCI Special Interest Group), which is a group of company containing more than 900 companies. The latest standard is the PCIe 3.0 which is available on the mainstream motherboards.
Per lane (each direction):
- v1.x: 250 MB/s (2.5 GT/s)
- v2.x: 500 MB/s (5 GT/s)
- v3.0: 985 MB/s (8 GT/s)
- v4.0: 1969 MB/s (16 GT/s)
16-lane slot (each direction):
- v1.x: 4 GB/s (40 GT/s)
- v2.x: 8 GB/s (80 GT/s)
- v3.0: 15.75 GB/s (128 GT/s)
- v4.0: 31.51 GB/s (256 GT/s)