111 reputation
3
bio website ieee-jbdavid.blogspot.com
location San Jose, CA
age 55
visits member for 4 years
seen Sep 25 '12 at 0:42
Mixed Signal Design Verification languages: -Verilog (in all its flavors esp Verilog-AMS) -perl -SKILL (the cadence variant of LISP) -(someday) Python & Matlab

111 Reputation

10 Sep 25 '12
100 Oct 11 '11
+100 12:12 assoc