As near as I can understand:
32-bit processors natively have 4GB (2^32 [bit] ) of address space -- Period. Because of MMIO (Memory-Mapped Input/Output) a portion of this space is also used to communicate with, and address the memory of, your peripheral devices (ie gfx cards).
In order to support multiple memory intensive applications and to compensate 8GB+ mainboard support, Intel (and later, AMD) introduced PAE (Physical Address Extension) to increase the addressing space to 48 bits (and later 52 bits), respectively.
This is accomplished by sending memory addresses in 2+ "chunks" (Dual-Cycle Addressing) -- the first 32 bits on 1 cycle, and the remaining bits on consecutive cycles thereafter.
However, for this new framework to be utilized, hardware manufacturers had to integrate support for DCA (aka DAC) into their respective products, typically requiring extensive hardware revision and special PAE enabled drivers.
Software also had to be rewritten to support Large Address Awareness, allowing more than the default 2GB of application memory space. Needless to say, because of the amount of software and hardware revision involved, and with the advent of 64-bit processors soon afterward, the technology (while popular in server and enterprise environments) never significantly penetrated the end-user market.