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Some processors support physical addresses of 46 bits and virtual addresses of 48 bits. Why 46 bits, why 48 bits? Shouln't x86 support 64-bit addresses? Why are virtual addresses not the same length as physical addresses?

Should applications be tuned to use 46/48 physical/virtual address? Are most applications supporting it?

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The 48-bit virtual address limit for x86-64 is based on the depth of the page table hierarchy. With 4 KiB pages and 64-bit page table entries, each level of the page table uses nine bits. Using three look-ups would have provided 39-bit virtual addresses, which was presumably recognized as too short-term a solution as adding levels requires OS support. Using four look-ups provides a 48-bit virtual address space.

Adding levels tends to increase the latency of a TLB miss (though intermediate nodes can also be cached to reduce the latency if there is a hit in these caches) since the look-ups are dependent.

With respect to the physical address limit, the page table entry is 64 bits and contains access permission and other information (9 bits: present, read/write, user/supervisor, page-level write-through, page-level cache disable, accessed, dirty, PAT, and global). x86-64 page table entries are currently defined to include 14 bits that can be used by the OS [9:11, 52:62] and are ignored by hardware. This leaves 41 bits available to specify a page number, which (given 4 KiB pages) supports 53-bit physical addresses.

The choice to support a smaller physical address space than what is supported by the page table entry format is implementation-specific. Providing a physical address space larger than the virtual address space introduces issues for operating systems, particularly for those that map the entire physical address space into the virtual address space.

For a given processor with an integrated memory controller, the number of memory channels and the types of memory supported are fixed providing a significant constraint on the maximum memory capacity. Adding more chips with memory controllers has scaling issues, particularly with respect to latency. (Systems with large NUMA factors can be useful but such systems are not a significant target for x86-64.)

Increasing the physical address space increases the size of cache tags (in the common physically tagged caches) and introduces other overheads. If the addresses would not be useful for the expected uses of the system, these costs would directly reduce profitability. (There may also be some incentive to limit capacity to encourage future upgrades.)

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The 44 Bits were used in 64Bit Windows vesion until Windows 8.1 (before November 2014 Update Rollup) to make memory management easier. Since Windows 8.1 November 2014 Update or Windows 10, Windows now uses 64Bit for virtual addresses. With this larger address space it is possible to make Windows more secure by providing Control Flow Guard (CFG)

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