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Is there a USB 3.0 host that is capable of providing USB 2.0 high speed connections on multiple ports simultaneously?

TO BE CLEAR, I'm asking if a USB 3.0 host can split it's 5 Gb/s over multiple fully saturated USB 2.0 high-speed devices?

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This is a misconception. Nobody "splits" or "re-distributes" anything in USB3 architecture. USB2 signals go through USB2 D+/D- channel exclusively, USB3 signals go through Tx/Rx pairs. I guess this misconception comes from the older and different USB2 architecture, where full and low-speed (FS and LS) transactions can be really "split" between multiple FS/LS connections. In USB2, this function was implemented via so-called "Transaction Translator" (TT) block built into each hub. And the HS bandwidth could be "split" between FS devices only if multiple TT (MTT) are designed into the hub. This kind of translation architecture is not implemented nor specified in Super-Speed USB3 architecture.

If you connect four USB2 HDD to a hub, all FOUR will get an aggregate of 35-40MB/s per HOST, or 8-10MB/s sustainable throughput per each drive. Higher USB3 "bandwidth" has nothing to do with USB2 transactions, absolutely nothing (except that the xHCI USB3.0 controller architecture might be somewhat more efficient in handling protocol overhead).

USB3.0 hubs have essentially two hubs inside, a USB3, and a legacy USB2. They function independently, they just redirect (mux) downstream ports to one hub controller or another if a device is attached, or just work in parallel if hubs are in the segment.

Same goes for USB3.0 hosts, the architecture is the same, and they are called the same, except that it is "root" hub. If you get the USBview.exe utility, you will see that the root xHCI controller branches into TWO ROOT HUBS, one SS USB3, and another USB2. If you plug a USB3.0 device into mainboard USB port, it goes into the USB3 section, and logical port number will be, say "1". If you plug a USB2 device into the same physical port, it will be directed to USB 2 branch, and its logical port will be something like "5", so the total bandwidth will be defined by corresponding root hub section. No one shares the super-speed bandwidth with high-speed devices, they are nearly independent.

So the answer to OP question is "NO".

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    I personally believe that the omission of SS-to-HS translation is a big oversight on the side of USB governing body. It is difficult to expect all USB device to be SS in the future, and all current USB wiring must carry the legacy D+/D- wires across all cables to support all these devices. Maybe this will change in the future of USB, I don't know. Dec 23 '16 at 19:02
  • +1 Thanks for this eye-opener. Does this imply that the USB 3.0 and USB 2.0 paths are additive? i.e., USB 3.0 hub with a USB 3.0 device that saturates the USB 3.0 bandwidth. Can you add a USB 2.0 drive to the hub and it will still have access to the USB 2.0 bandwidth?
    – fixer1234
    Dec 23 '16 at 19:08
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    @fixer1234, physically yes, USB2 path adds to USB3 path. But I am not sure if host controller architecture and software driver can manage both paths effectively. It depends on how many independent "Device Slots" the controller DMA engine supports. It depends on implementation. I am a bit fuzzy on INTEL/SYNOPSIS xHCI controller implementations. Maybe somebody else can clarify. Dec 23 '16 at 22:04
  • This is exactly the explanation I was looking for. I already knew the answer, I was just hoping to understand the why.
    – Cody Smith
    Dec 24 '16 at 19:23
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I have met a similar question but migrated without an answer. I looked up the Web and found an answer here:

Tom's Hardware

According to this answer, multiple USB 2.0 devices can run at full speed on USB 3.0 hosts. If your experiment contradicts with this answer, please let me know.

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    The blurb on Tom's Hardvare is wrong, totally. See correct answer. Dec 23 '16 at 18:38
  • Is there an experiment that conforms to this idea of all USB ports working at HS bandwidth at the same time on a USB3 host? Dec 24 '16 at 17:56
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From the XHCI specification 4.6.15 Get Port Bandwidth:

An xHC may support multiple USB Bus Instances (BI), where each BI represents a "unit" bandwidth at the speed that the BI supports. Also note that multiple Root Hub ports may be assigned to a single BI.

In other words, a given controller may work as @Ale..chenski describes, but it's not required to do so. I've got a desktop with an add-in card with Renesas controller chip that only has one BI of USB 2.0 HS bandwidth shared between four root hubs. I moved all three webcams from that crippled controller to the on-board Intel xHCI controller: now all three can run simultaneously. No two cameras can share a single BI, so that Intel controller features at least three HS BIs.

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