Also what does 8 bit words mean?
In context, the word size goes with the address size to describe the memory bus. There are 16 bits gling out to the memory so it can choose 64ki locations. Then, each location contains 8 bits.
The word size here may or may not match the CPU computation unit size, and this may or may not match the logical granularity in addressing.
For example, a CPU may advertise a 16-bit bus (for this purpose). It uses 16-bit addresses in its instructions, and like your example has 64ki. But it has 15 bits of address bus and 16 bits of data bus. It only needs 32ki addresses and always gets 2 bytes with each location. (If an instruction wanted 1 byte, it would dispatch the address with the least bit missing, fetch both bytes in that step, then look at the least bit of the desired address to decide which half to use.)
Note that bank switching, PAE, etc. mentioned by others are not relevant here. A memory management unit might use 16-bit addresses and have 20-bit hardware address, so the CPU needs to switch and map things to make use of the actual 20-bit address range of RAM chips that can be addressed.
Be sure to specify units in your answers. “64ki”. Of what? 8-bit words, making it (still) 64ki bytes of addressable RAM. That step eliminates confusion and makes problems like this trivial.