So I recently taken interest in learning about computer hardware and thought you guys might help, I am referring Upgrading and Repairing PCs book and came across pipelining since I wanted to have a good understanding how it worked I went through some wikis, but I am confused by a particular line which seems to be common in all of them i.e pipelining increases the clock rate/ clock speed. Deeper the pipeline higher the clock rates(but not always due to some hazards) Shouldn't it be the IPCs that increase rather than the clock speed. As far I know that clock speed are the ones that are generated by the quartz and depend on the voltage and we define clock speed as number of cycles per second. And ina pipelined architecture we are able to execute mutiple microinstructions in a single clock tick, Am I getting something wrong? What do people refer to when they say clock speed/rate, is it the frequency of the quartz crystal( that should be constant and shouldn't be affected by how the architecture is) or the frequency of instructions (No. of instructions per second)
2 Answers
You understand clock-rate correctly. it is the result of hardware, and is unchangeable.
From Wikipedia:
In computer science, instruction pipelining is a technique for implementing instruction-level parallelism within a single processor. Pipelining attempts to keep every part of the processor busy with some instruction by dividing incoming instructions into a series of sequential steps (the eponymous "pipeline") performed by different processor units with different parts of instructions processed in parallel. It allows faster CPU throughput than would otherwise be possible at a given clock rate, but may increase latency due to the added overhead of the pipelining process itself.
https://en.wikipedia.org/wiki/Instruction_pipelining emphasis added
So the bolded sentence may be tricky to unpack for a non-native English speaker. It isn't saying that it increases clock rate. It is saying that it does more in the same amount of time, because pipelining lets the CPU perform the same task more efficiently. It uses fewer cycles to get the job done.
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1Your CPU isn't a 100MHz chip multiplied work wise up to 4.4GHz, it does actually work at 4.4GHz. The base clock is 100MHz because it is a lot easier for us to generate a reasonably precise 100MHz clock common to many components and then multiply it up to various other speeds as required than it is to create a single stage multi-GHz variable clock for everything. You do not get 44 instructions per clock either because the core clock isn't 100MHz, you have an actual core clock speed that is 4.4GHz.– Mokubai ♦May 10, 2019 at 9:51
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You are probably confusing the "bus speed" clock which is used to communicate with other devices and gets multiplied up to the core clock speed. It does not mean that the core is "only" 100MHz though. While otherwise you are largely correct that paragraph is dangerously wrong.– Mokubai ♦May 10, 2019 at 10:03
I am assuming you know the basic stuff about a pipeline and what a pipeline stage is.
When we make a pipeline deeper, we are essentially splitting up the current stages into smaller, shorter ones that perform a fraction of the operations of the original stage. When we divide a stage into smaller steps, it means that each step now needs less time to finish (it has fewer operations to carry out). Thus, we can reduce the clock cycle and increase the clock rate.
