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I'm working with some x86 CPU's with ECC RAM.

We have some memory testing code that can test the memory and check the relevant Machine Check registers for corrected ECC errors. Using the ECC information, we can find which DRAM chip is bad.

However, with larger bit failures that ECC cannot correct, for instance an entire 8-bit DRAM chip failing, the system simply crashes because the code that's supposed to detect that error and report it is running in memory itself. When you're missing 8-bits the instructions simply can't be read anymore.

Could a solution to this be to write memory testing code that exclusively resides in the CPU cache using the BIOS initialization cache-as-ram technique?

That way no memory failure could take down the code and any problems with physical memory, however large, can be detected.

Is this possible?

  • I’m not sure that fixes my problem. Regardless where I load my program in memory, if an entire DRAM chip in the rank goes down, the system will crash without being able to report the memory failure. A word is read/written across all chips in the rank, like raid0, so if one goes down the data is completely lost. – Matviy Kotoniy Aug 21 '19 at 20:57

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