Yes I know that Xeons are meant for server use, require different motherboards and you can have more than one of them in a box.

But technically how is a Xeon processor itself different from a regular core 2 processor?


The answer is that it's not very different. It has a larger cache and is not explicitly crippled to prevent it working in multiprocessor systems. Xeons also have support for ECC memory, which is not normally supported on consumer CPU chips. Otherwise the basic processor core is much the same.

On older 32 bit systems the Xeon's MMU was slightly more clever in that it could support multiple 4GB process spaces in up to 64GB of physical RAM. SPARC v8 chips had a similar feature in the MMU. This feature worked because of the difference in the number of bits needed to address an offset within a page (12 for a 4KB page) and the number of bits needed to record a page's status (RWX, dirty etc.). The extra bits could be used for a slightly wider physical page reference (24 bits vs. 20 to specify the page number) allowing a 36-bit physical address. However a single process could only see a contiguous 4GB address space at any given time.

Some systems (e.g. Datacentre versions of Windows Server) had an API that allowed a process to control the MMU to overlay chunks of this physical address space into its virtual space. This feature was used in enterprise versions of SQL Server to support larger disk caches.

Most if not all modern CPUs support feature this when running in 32 bit mode, and there are probably plenty of shops still running legacy 32 bit applications in this mode, either on VMs (where the MMU is emulated with a greater or lesser amount of hardware support) or physical tin. However, 64 bit builds are much more prevalent on modern large-memory server builds these days, which allow larger contiguous memory images within a process.

  • I'd be really surprised if the Xeon version of those chips were the only one with PAE. Prior chips (before Xeon) already had that support, so it's not like it would have been a new selling point... – Brian Knoblauch Dec 9 '08 at 12:26
  • Older Xeon chips (from at least the PIII Xeon) had this - I don't think it was supported on consumer P2/P3/P4 chips. – ConcernedOfTunbridgeWells Dec 9 '08 at 14:05
  • Mostly a supporting chipset issue. Those did really differ for consumer PCs. – MSalters Jun 29 '09 at 12:40
  • Bigger L3 cache
  • Multiprocessor support
  • Generally adjusted for server usage (heavy load, long runtimes)

The key thing about Xeons is that they are geared towards the server/workstation market and thus are designed to be more reliable and always-on, and for MP enviroments.

They work in different motherboards (different chipsets) - usually alongside FB-DIMMs, which are slower but more reliable than their consumer equivalents.

In general, there is a Xeon equivalent for each Core 2 CPU; for example a Q6600 is almost identical to the X3220, though there are some variations.


Xeon is optimized for multiprocessor architecture

  • Supports the QuickPath Interconnect, the Intel InterBand offering high bandwidth and low latency

  • Provides more cache (35MB vs. 6MB for i7 Core)

  • Provides higher memory bandwidth (102GB/s vs 25.6GM/s for i7 Core)

  • Supports ECC memory

  • Possible coupling with Xeon-Phi coprocessors ("accelerators") in a many-core architecture

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