# How can I find my computer's address bus width and data bus size?

I have a 64 bit x86 (x86-64) computer. Does that mean my address bus is 64 bit? I am trying to calculate addressability and address space as explained here.

I don't really have any clue how to find my data bus size either.

If it helps, here is the Specification for my CPU (I assume that would be the relevant thing)

Also, wiki chip has this to say about my CPU if that can help at all

• This feels like an XY Problem. What exactly are you trying to achieve once you get this information? Sep 25, 2020 at 4:56
• calculate addressability and address space rmhighercomputing.wordpress.com/2011/12/07/… Sep 25, 2020 at 4:57
• Please do not accept answers that don't answer the question. You accepted an answer that didn't address the question of the size of the data bus, Sep 25, 2020 at 22:44
• @Giacomo1968 see my answer for where his question is coming from. Though unfortunately he accepted an answer that only answered the easy half of his question(address bus) and avoided the harder part (data bus). He should really unaccept that "answer" and push for somebody to answer what he asked re data bus Sep 25, 2020 at 22:48
• @barlop Thanks for the heads up. But to the original poster (notacorn) you should really clarify what your core question is. If the accepted answer doesn’t fully answer the question then it should not be the accepted answer. Sep 25, 2020 at 22:52

x64 refers to 64 bit architectures. Rather confusingly x86 refers to 32 bit systems.

The maximum address space is calculated by simply raising 2^n e.g. for 32 bits it is 2^32 = 4294967296 (4 Gigabytes).

For 64 bit the possible address space is rather large

2^64 = 1.8446744e+19

So you won't find a practical implementation in the real world. Actual systems you can buy don't need to exploit the full possible address space and the maximum amount of memory on (expensive) motherboards (at the present time) is 512Gb for example https://www.mwave.com.au/motherboards/server-workstation-motherboards

• This does not answer the question. The question asked about not just address bus, but data bus Sep 25, 2020 at 22:44
• I didn't think that I needed to spell out the fact the the data bus in a 64 bit architecture is in fact 64 bits but there thou go Sep 26, 2020 at 0:51
• well it's worth spelling out because e.g. some CPUs could have general purpose registers that are twice the size of the data bus. So the data bus could have a capacity of e.g. 1 byte, and the registers, a capacity for 2 bytes. So whether that was an 8bit CPU or a 16bit CPU,there'd be the question of if taht refers to the registers or the pins for data bus / the data bus on the mbrd for it Sep 26, 2020 at 0:57
• There's nothing confusing about x86 being used to refer to 32-bit systems. x64 is short for x86-64. x86 is the name for the x86-16, x86-32 and x86-64 family because they begin with 8086 and 80186, 80286, 80386, 80486. Sometimes it's also used to refer to x86-32 Oct 5, 2020 at 15:09

This CPU can address 64 GiB. 64 bit dual channel with 36 address lines. However the : Razer Blade 15 is limited to 32 GiB.

DDR4-2666, or LPDDR3-2133. 64 bits wide = 8bytes (3bit address)

Thus to address 32 GiB or 4GiW gigawords one only needs 35-3bit word address= 32 bit address to access 32 GiB

1word=8bytes=2^3 bytes so the CPU can address 4GiW = 32GiB. ( the “i” means the binary version of bytes... like 1024 instead of the decimal version 1000 is kilo)

• " Razer Blade 15 is limited to 32 GiB" out of pure curiosity, does this have anything to do with RAM limits? I've heard people with dual channel 32 gb ram sticks in a blade Sep 25, 2020 at 13:33
• this doesn't cover the question of data bus size, that the question asks Sep 25, 2020 at 22:43
• Where is 32 address bits in your answer for 32GiB or 4GiW max memory for this MOBO in your long winded history of computing Sep 25, 2020 at 23:53
• ok 32bits address 4Giga (giga in 2^n sense) locations of memory. If each location is 8 bits then that's 4GB (in the 2^n sense). You seem to be treating a treating a location as 8 bytes long. Are you sure? If so, then in assembly language, if you specify a memory address, and store a number there, that number would occupy 8 bytes? Sep 26, 2020 at 0:48
• @barlop you may need to do some reading software.intel.com/content/www/us/en/develop/articles/… Sep 26, 2020 at 6:51

There are not yet any x86-64 systems that have a 64bit address bus.

``````grep 'address sizes' /proc/cpuinfo
``````

Tested on Debian Gnu/Linux.

I get

``````address sizes   : 39 bits physical, 48 bits virtual
``````

This means

• at most 2³⁹ bytes (2⁹ GB = ½TB) can be addressed, for ROM, ROM, VRAM, IO, …
• at most 2⁴⁸ bytes (2⁸ TB = 256TB) of virtual memory can be addressed, per process.

There may be other limits on physical memory, imposed outside of the CPU: Number of RAM sockets, capacity of each socket, …

# Data bus

The logical width of the data-bus, of an x86-64 is 64 bits. However the physical size is what ever the manufacturer chooses. They can choose what ever they want, with out affecting behaviour. E.g. Multiplex 64 bits over 32 or 16 bit bus, or send two 64 bit values over a 128 bit bus.

All this is farther confused by serial busses. Where we send in all over a one bit bus, but very very fast (as it turns out that making buses wider, is hard, and even for a 2 bit wide bus it is hard to make it go fast ). Then we add multi channels. I don't know the details, but have seen many good resources on this.

To add to what some have said, the entire nature of the question "How can I find my computer's address bus width and data bus size?" Tells me it's coming from old computer science textbooks.. I don't know to what extent it applies in modern systems or systems over the last 20 years.

Some people answering aren't familiar with where the question is coming from, so i'll address that. To directly address your question though all I can say is i'm not sure how much the concept of a data bus and address bus applies.. it must apply in some way You can look up about "word size" which is a very ambiguous term I mention it a bit at the end.

For those that don't grasp the question, the question assumes a model where you have a memory bus, a data bus, and a control bus.

`````` CPU<---address bus--------->main memory(RAM)
CPU<---data bus------------>main memory(RAM)
``````

And I don't recall how the control bus and IO come into play well enough to do my own diagram but here with a picture myself, but here is a picture.. A book from the late 90s may have had this and probably in early 2000s and maybe even 2010 onwards.. and now it's 2020.. but this looks like where your question is coming from.. info I saw in late 90s, early 2000s.. that is probably still out there / still taught. And was old school even for the late 90s.

and here

Does this still apply in modern architecture, probably not.

and

Here mentions a Harvard model and a Von Neumann Architecture https://www.polytechnichub.com/difference-harvard-architecture-von-neumann-architecture/

And you can have DMA https://tspradeepkumar.wordpress.com/2008/07/15/direct-memory-access/

If I were a bit more knowledgable I could show you how these architectures have evolved to whatever it is we have today! Then identify the address bus and data bus, or their equivalents! That'd be really how to answer the question and answer it well. All I can say is modern systemse might be more complex than that kind of architecture.

There is a horrible term called "word size" that is really ambiguous.. and may address your question somewhat.. Is "word size" referring to the size of the data bus, or the size of CPU registers, who knows.. but if it refers to the data bus, you're in luck and if it refers to the cpu general purpose register sizes, they that might not be far off the data bus size.

Modern processors, including embedded systems, usually have a word size of 8, 16, 24, 32, or 64 bits

I've had similar questions in the past, it's not easy to find answers but hopefully this info helps on your quest.

A lot of the time, info is only given in domains.. and when practical and so people that design CPUs know the truth, and others get some kind of "working model". (e.g. techies often have fundamental misconceptions about web servers that they only find out they had, if they get the chance to program one). CPU manufacturers might produce some "white paper" or lots of detail about it but it may need a strong electronics background to really understand.

There is a kind of disconnect between what is in computer science textbooks, and whatever the truth is about what modern architecture is, and I haven't seen that bridge covered in a book, though it was years ago when I looked. When people would speak about the things in more detail, they'd give examples from the Intel 8086 and Intel 8088! (which are from the late 1970s) https://en.wikipedia.org/wiki/Intel_8088 " the 8088 had an eight-bit external data bus instead of the 16-bit bus of the 8086"

• wow, thanks for the really thought out answer! is the von neumann architecture outdated? because i can assure you it's the way this stuff is taught for textbooks published as recent as this year Sep 25, 2020 at 15:08
• @notacorn you write "it's the way this stuff is taught for textbooks published as recent as this year" <-- doesn't surprise me! it's all ancient. von neumann died in the 1950s! Von Neumann was a genius that figured out some basic principles, some of which may still be in use in an evolved form, but that's probably about as far as it goes in terms of relevance to modern architecture. Sep 25, 2020 at 15:18
• This does not answer either question for this CPU and MOBO with has a 32GiB RAM limit only needing fewer address bits for an 8byte word Sep 25, 2020 at 23:43
• @TonyStewartSunnyskyguyEE75 my post doesn't answer it, I agree, but it does move towards answering it.. and explains some things that many other answerers didn't understand, in particular, where the questioner is coming from and what he is asking as well as moving towards an answer. My "answer" shouldn't be accepted but neither should any other that doesn't answer the question. Sep 26, 2020 at 0:02
• I revised mine which is the one which does answer both Sep 26, 2020 at 0:35