As far as I understand. Serial means data is being sent one by one instead of parallel where multiple bits of data are streamed simultanously.
That is more or less correct. Serial means that symbols (one symbol can encode more than one bit, the simplest possible example would be transmitting 2 bits by using 4 different voltages instead of just "ON" and "OFF") are sent one after the other on a single line, parallel means that multiple symbols are sent at the same time, each on a separate parallel line.
The big problem with parallel transmission is timing: if one of the lines is only slightly longer or shorter than the other ones, then that symbol will arrive before or after the other ones. This means that the receiving end needs to have some way of buffering symbols for at least as long as the differential between the earliest arriving symbol and the latest arriving symbol.
Every bend in the cable, every slight imperfection in the manufacturing process, will increase the amount of path differential. Think about even how you would route the traces on a circuit board to a connector: every time you go around a corner, the outer traces are longer than the inner ones.
And as soon as the differential gets close to the (inverse of the) clock rate, i.e. the differential between the earliest and latest symbol approaches the time between two symbols, you can no longer reconstruct the data.
There are two ways to make a parallel transmission faster: increase the clock rate and increase the number of parallel lines. However, the problem outlined above puts a hard limit on both ways to make a parallel transmission faster:
- If you increase the clock rate, the time between symbols decreases and thus your maximum allowed differential decreases. This means if you increase the clock rate, you potentially need to limit the number of parallel lines to limit the potential for path differential.
- If you increase the number of parallel lines, you increase the potential amount of path differential. This means if you increase the number of parallel lines, you potentially need to limit the clock rate to allow for increased path differential.
Longer cables also increase the potential for path differential, so the faster you make your transmission, the shorter the allowed cable length will be. A real-world example is the last version of parallel ATA, where the maximum allowed cable lengths were so short that in some large tower cases (which are the case form factor that was used for high-performance workstations that would benefit the most from faster HDD transfer speeds) you couldn't even reach the HDD bays from the motherboard!
Once you get to higher speeds the complexity just becomes unmanageable.
Howewer connections like SATA and USB 3 actually have more than 2 data pins. So in the end what is the real meaning of serial and parallel?
Let's look at what those pins are actually for.
We have to talk about a couple of things here. Number one is the distinction between simplex, half-duplex, and full-duplex. In general, you can only send data one way on an (electrical) line. This is called simplex communication.
However, you generally want to send data both ways. One way to do that is half-duplex communication, where you can send data both ways, but not at the same time. Only one station on one end of the link can send data, and then you switch this around so the other station can send. This is undesirable. Instead, most high-speed communication links (regardless of whether they are serial or parallel) are full-duplex, and the way this is typically done is by simply having two lines, one for transmitting and one for receiving. (It's not required to have two lines, but it is way easier.)
This, BTW, is the reason why crossover cables exist where the wires between the Tx and Rx pins in the connectors are swapped.
So, we already need two pins for one connection.
The other thing we need to talk about is differential signaling. This is a way to improve the resilience against external electromagnetic noise introduced into the cable. At a very high-level view, it is actually very simple: instead of transmitting your signal on one wire, you use two wires, where one wire carries the exact inverted signal of the other wire. These two wires are twisted together into a twisted pair.
Since the two wires are closely twisted together, any noise that is introduced, will affect both wires roughly equally. But! Since one wire carries the exact opposite signal of the other wire, what the receiver can do is simply look at the difference of the two wires, and since the noise is the same on both wires, it will cancel out:
- Wire 1 carries: +signal + noise
- Wire 2 carries: -signal + noise
- The difference is: wire1 - wire2 = +signal + noise - (-signal + noise) = +signal + signal + noise - noise = 2×signal
So, again, we need two pins for one signal.
If we combine full-duplex and differential signaling, this means we already have 4 pins for one serial connection. This is not parallel communication, this is a single serial link. (In fact, parallel connections also often use full-duplex and differential signaling, which means they have 4 pins for each parallel line.)
So, if we look at SuperSpeed USB, that has 8 data pins. But if we take into account what we discussed, that is really only two communication lines.
But still, why two? Doesn't that make it parallel?
No, it does not, and the reason is that these are two independent serial data communication channels. Such channels are typically called lanes. Each of the two lanes is its own independent serial communication channel. These two lanes could be used for two completely independent data streams (I believe Thunderbolt can do this). Or, you can multiplex a single higher-level data stream across multiple lower level packet streams.
This is fundamentally different from parallel transmission of the individual bits / symbols. Each symbol is transmitted in series over just one line, groups of symbols are treated together as a single packet, but packets are again sent in series over a single line. Only at a much higher level do you split your data into individual packets and send those packets over multiple lanes.
Because were not just sending individual symbols in parallel, but there is a higher-level packetization / framing, it is much easier to deal with different travel times across the different lanes. We could add sequence numbers to the packets, so even if they overtake each other, we can still assemble them in the right order. We can detect missing sequence numbers and ask for retransmission.
Our "synchronization boundary", i.e. the point where we need to synchronize the parallel lanes is much larger: we need to synchronize on packets, which can be many bits long instead of each individual bit. So, our "synchronization clock" is only a fraction of the clock speed of the line.