CPUs are relatively small, and engineers are constantly trying to make them smaller and get more transistors in the same surface.

Why aren't CPUs bigger? If an approximately 260mm2 die can hold 758 million transistors (AMD Phenom II x4 955). Then a 520mm2 should be able to hold double the amount of transistors and technically double the clock speed or cores. Why isn't this done?

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    I don't know all the details, but basically the closer the transistors etc are together on the chip the more efficient it is. So quadrupling the area would make the chip slower. – ChrisF Nov 30 '11 at 15:46
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    Plus, especially considering the current state of applications, modern day CPUs spend an awful lot of time doing nothing. They twiddle their thumbs while us, the users, figure out what we want to do. – surfasb Nov 30 '11 at 16:07
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    @ChrisF You confuse the impact of die shrinking (speed gain as a result of reduced capacities) with reduced transistor numbers. Ask yourself: will the individual core on a dual core run faster than the one on a quad core? – wnrph Nov 30 '11 at 17:14
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    This is done - look at Intel's new LGA2011 platform. – Breakthrough Nov 30 '11 at 17:31
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    I disagree with the closed votes. There are clear reasons as to why making a bigger chips doesn't make sense as is shown by the top answers. So it isn't an opinionated question (like "Is android better than ios"). I was also interested by this question! – David Miani Dec 17 '11 at 8:04

Generally you're right: In the short term, increasing parallelization is not only viable but the only way to go. In fact, multi-cores, as well as caches, pipelining and hyper-threading are exactly what you propose: speed gain through increased chip area use. Of course, shrinking geometries does not collide with increasing die area use. However, die yield is a big limiting factor.

Die yield grows in inverse proportion to die size: large dies are simply more likely to "catch" wafer errors. If a wafer error hits a die, you can throw it away. Die yield obviously affects die cost. So there's an optimal die size in terms of costs vs. profits per die.

The only way to produce significantly larger dies is to integrate fault tolerant and redundant structures. This is what Intel tries to do in their Terra-Scale project (UPDATE: and what is already practiced in every-day products as Dan points out).

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    In modern complex CPU/GPUs die defects often just feed into binning. Mid/upper level GPUs typically have a full die part and one or two that have a few sub-components disabled to get more price/capability points from fewer chip designs. The same is done with CPUs. AMD's tricore chips are quads with a die disabled, and intels LGA2011 chips are all 8 core parts. The full dies are only being used as Xeons. The 4/6 core i7-2011s are 8 core dies with parts disabled. If die errors fall in the right locations they are binned as cheaper parts. For more modular GPUs error rates set the low bin. – Dan Is Fiddling By Firelight Nov 30 '11 at 19:25
  • @DanN Thank you, I've added this to my answer – wnrph Nov 30 '11 at 22:13

There are a lot of technical concerns (path lengths get too long and you lose efficiency, electrical interference causes noise), but the primary reason is simply that that many transistors would be too hot to adequately cool. That's the whole reason they're so keen to reduce the die size - it allows for performance increases at the same thermal levels.

  • I should add that I mean in the context of a standard desktop/laptop machine, of course. – Shinrai Nov 30 '11 at 16:07
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    Path lengths don't necessarily increase, they are a local thing: putting two cores on a chip won't increase the path length inside a core, will it? Heat dissipation will also distribute on a larger area, so that's not such a big problem, too. – wnrph Nov 30 '11 at 17:09
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    Right, there's a lot of nuance, but I didn't feel getting into it was warranted. (I also don't necessarily mean in the context of MORE cores, since the question wasn't quite that explicit about that.) – Shinrai Nov 30 '11 at 17:16
  • The point is: multi-core processors are exactly what the OP proposed--speed gain through increased chip area use. – wnrph Nov 30 '11 at 17:29
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    How do you figure hyper-threading is, "bigger faster cores"? Hyperthreading is all logic based and has nothing to do with size... Meaning if there is excess available on the current core it uses it. IE: if your MMX unit and FPU are in use on a given core you can still preform integer based calculations. – Supercereal Nov 30 '11 at 19:04

Several of the answers given here are good answers. There are technical issues in increasing the size of the CPU and it will lead to a lot more heat to deal with. However all of them are surmountable given strong enough incentives.

I would like to add what I believe is a central issue: economics. CPUs are made in wafers like this, with a large number of CPUs per wafer. The real manufacturing cost is per wafer, so if you double the area of a CPU you can only fit half as many on a wafer, so the per-CPU price doubles. Also, not all of the wafer always comes out perfect, there can be errors. So doubling the area doubles chance of a defect in any specific CPU.

Therefore from the economic standpoint the reason they are always making things smaller is to get better performance/mm^2, which is the determining factor in price/performance.

TL;DR: In addition to the other reasons mentioned doubling the area of a CPU more than doubles the cost.

  • This is the main reason. Chapter 1 of Hennessy and Pattersons's Computer Architecture textbook describes the fabrication process and the considerations that go into driving CPU dies to be as small as possible. – Steve Blackwell Nov 30 '11 at 21:48

Adding more transistors to a processor doesn't automatically make it faster.

Increased path length == slower clock rate.
Adding more transistors will increase the path length. Any increase has to be used valuable or it'll cause an increase in cost, heat, energy, but a decrease in performance.

You can of course always add more cores. Why don't they do this? Well, they do.

  • I don't really consider this off-topic here (although it would be on-topic there as well). – Shinrai Nov 30 '11 at 19:54
  • Yeah, I agree. I just think that it would be better answered there. I removed the line. – user606723 Nov 30 '11 at 19:58

Your general assumption is wrong. A CPU with a double sized die does not mean it can operate with double speed. This would only add more space for adding more cores (see some Intel manycore chips with 32 or 64 cores) or larger caches. But most of the current software can not make use of more than 2 cores.

Therefore the increased die size increases the price massively without a gain of the same height. This one of the (simplified) reasons CPUs are as they are.

  • This is not quite true - with more transistors, you could decrease the propagation-depth so instructions take fewer clock-cycles to complete. You're right that it has nothing to do with clock speed, though. – BlueRaja - Danny Pflughoeft Nov 30 '11 at 20:19

In Electronics SMALLER = FASTER 3GHz needs to be much smaller than 20MHz The larger the interconnections, the greater the ESR and the slower the speed.

Doubling the amount of transistors doesn't double the clock speed.

  • Increasing the clock speed is only one approach to speed gain. Doubling transistors is another one. Apart from that, shrinking interconnections does not conflict increasing die area. – wnrph Nov 30 '11 at 17:39
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    @artistoex, but simply doubling the transistors doesn't make it faster either. It needs to be engineered in a way that will take advantage of those transistors. More transistors (with the same mm) means a lower clock typically. – user606723 Nov 30 '11 at 19:29

The cost of producing the raw wafers is a factor. Monocrystalline silicon is not free, and the refining process is somewhat expensive. So using more of your raw material increases cost.


Big living things, artificial or not, like dinosaurs, are loosers. The ratio area / volume is not fair for their survival : too many constraints about energy - every form - in and out.


Think of a CPU as a network of connected nodes (transistors). In order to provide more capabilities the number of nodes and the paths between them increase to a degree, but that increase is linear. So one generation of a CPU might have a million nodes, the next might have 1.5 million. With miniaturization of the circuit, the number of nodes and paths are condensed into a smaller footprint. The current fabrication processes are down to 30 nanometers.

Let's say that you need five units per node and five units distance between two nodes. End to end, in a straight line you can create a bus of 22222 nodes in 1 CM of space. You can make a matrix of 493 million nodes in a square CM. The design of the circuit is what contains the CPU's logic. Doubling the space is not what increases the speed, it just would enable the circuit to have more logical operators. Or in the case of multi-core CPUs to allow the circuit to handle more work in parallel. Increasing the footprint would actually decrease the clock speed because the electrons would have to travel longer distances through the circuit.

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