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Suppose I have a multi-core system, say 4 cores, and in this I pin 3 user process to a 3 CPU's.
In such a case, where will the kernel reside?
Suppose one of the user process make a system call, or say an IOCTl, to the kernel. Will that IOCTL be executed on a 4th CPU where kernel resides?
Kernel resides in memory, and is executed on all CPUs and cores simultaneously.
ioctl(2) or read(2) will either return immediately (like a function call in your own program), or block a thread. 'Block a thread' means kernel scheduler will suspend your thread and run another thread on that CPU/core. Your thread will remain blocked until interrupt handler unblocks it (marks as runnable). Interrupt handler runs in kernel mode, usually on the first physical CPU, it is called by hardware after I/O is done. After being marked as runnable, your thread will have a chance to continue its execution when kernel scheduler is run next time, possibly on another CPU/core.
The kernel per-se resides nowhere, or better said resided everywhere. The process making the syscall will continue on the CPU making the call and will copy the code from the kernel image into its cache. As the code is read only, every CPU will have a copy of it in its caches. The cache lines will be evicted in the same manner as any other code of your system. This means parts that are very often called will be often in cache, those that aren't won't and will be brought in from higher cache lines, ram, disk etc.
The kernel lives in the system main memory. It is loaded there (RAM) when the system boots. Some parts of the kernel will be executed by the CPU at various times. While executing, the code (CPU instructions) will be in the internal memory of a specific CPU or core.
Exactly which core in a multi-core CPU, or which core in a multi-CPU system is impossible to answer without some knowledge about kernel design and the abstractions used by operating systems for communicating with a CPU or CPUs.
All I know is that the kernel will follow a set of rules for accessing one or several CPUS. Until someone more experienced comes along with a better explanation, you could dig into SMP design.
Chapters 5 and 6 of Structured Computer Organization scratch the surface of the technical aspects involved in commanding a CPU to execute some action and how that action is managed. Perhaps that would be an interesting read?
