I am trying to create a file Makefile to use with make so I can compile my codes faster. What I would like to do is just type in the terminal:

make dev myOutputName

And it should run:

gcc -Wall -ansi -pedantic -O2 dev.c -o myOutputName

So far I have the following Makefile:

CFLAGS = -Wall -ansi -pedantic -O2 -Wno-unused-result
CC = gcc

%: %.c
    $(CC) $(CFLAGS) $<  -o $\dev

First, is that correct above? I tested it and it compiles, but the output name is always dev.

How can I change it so I can type:

make dev myOutputName

And it will run:

gcc -Wall -ansi -pedantic -O2 dev.c -o myOutputName
  • 1
    You are explicitly setting the output to be dev (-o $\dev). – terdon Aug 23 '13 at 13:00
  • How do I change it? – user247939 Aug 23 '13 at 13:23
  • Set it to -o myOutputName just as you do when running manually. – terdon Aug 23 '13 at 13:23
  • @terdon There is no way I can type: make dev "random name that it will run: gcc -Wall -ansi -pedantic -O2 dev.c -o "random name"? – user247939 Aug 23 '13 at 17:16

You don't really need a Makefile for this, you could use a bash function. Add this to your ~/.bashrc file:

function mkdev(){
    gcc -Wall -ansi -pedantic -O2 $1 -o $2

Then, source ~/.bashrc (it is easy enough to port to other shells if you are not using bash) or simply open a new terminal and you can compile your code with

mkdev dev myOutputName

In bash, $1, $2 , ... , $N are the arguments given to a program or function. So, the function above takes the 1st argument and looks for a file with that name and a .c extension and the second argument is the output name.

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  • That's exactly what I wanted, thks man!! One more question @terdon, what does source ~/.bashrc do? What is the source command for? – user247939 Aug 23 '13 at 17:40
  • Glad to have helped, just to clarify, the source command forces bash to reread .bashrc and so load your changes. Starting a new bash session (opening a new terminal) will have the same effect. – terdon Aug 23 '13 at 18:02

make does not take a list of arguments. It takes a list of targets. You can set variables from the invoking command, though

make O=myOutputName dev 

In the Makefile:

%: %.c
       gcc -Wall -ansi -pedantic -O2 $< -o $(O)
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