In modern multi-core processors, the processor caches (L1,L2 and L3) are made up of SRAM with decreasing speeds(L2 caches are higher speed SRAM than L3 caches which is a cost trade-off). The main reason to use SRAM is its speed advantage over the main memory that uses DRAM. I would like to understand why SRAM has a speed advantage over DRAM?

1 Answer 1


Taken from an article on HowStuffWorks (Summarised):

Dynamic RAM:

Inside a dynamic RAM (DRAM) chip, each memory cell holds one bit of information and is made up of two parts: a transistor and a capacitor. The transistor acts as a switch that lets the control circuitry on the memory chip read the capacitor or change its state.

The article then goes onto compare the capacitors on DRAM to buckets, where the DRAM is filled with electrons to store information (storing 1s). These electrons are emptied when information is removed (storing 0s). The problem with capacitors is that they have leaks and lose information quite rapidly. In order to retain the information an outside source (CPU or Memory Controller) has to recharge all of the capacitors holding a 1 before they discharge.

This refresh operation is where dynamic RAM gets its name. Dynamic RAM has to be dynamically refreshed all of the time or it forgets what it is holding. The downside of all of this refreshing is that it takes time and slows down the memory.

Static RAM:

Static RAM uses a completely different technology. In static RAM, a form of flip-flop holds each bit of memory. A flip-flop for a memory cell takes 4 or 6 transistors along with some wiring, but never has to be refreshed. This makes static RAM significantly faster than dynamic RAM. However, because it has more parts, a static memory cell takes a lot more space on a chip than a dynamic memory cell. Therefore you get less memory per chip, and that makes static RAM a lot more expensive.

It is quite an interesting article so I would suggest reading it. I have taken the most relevant points from the article to help answer your question.

  • 7
    There is some misunderstanding about DRAM and SRAM. DRAM is optimized for density (higher capacity) and SRAM is optimized for speed (access latency). So, in general, SRAM is faster than DRAM. However, it is fundamentally possible to design DRAM to be faster than SRAM, but DRAM manufacturers don't do that since the most important selling factor for them is cost per bit. So they lower cost per bit at the expense of speed. Many people misunderstand this essential fact.
    – aminfar
    Oct 4, 2014 at 18:15
  • @aminfar: You said it's fundamentally possible to make DRAM faster than SRAM, but it would be expensive. But SRAM is already expensive. Why don't we see DRAM used as CPU caches then?
    – Tara
    Oct 10, 2016 at 1:57
  • @Dudeson they have different manufacturing process and requirements. Perhaps, using DRAM for CPU caches with good access latency would be even more expensive than SRAM. There are other things to consider apart from manufacturing, such as refresh.
    – aminfar
    Oct 12, 2016 at 18:24
  • 1
    @Tara the reason is "API": SRAM either show the stored bit immediately on change of the address input values (asynchronous SRAM), or after a clock edge (synchronous SRAM). DRAM works on the basis of complex requests, responses, and entire protocol to make a special DRAM controller just in order to use them! In general, because of this difference, DRAM have a much worse random access latency comparing to SRAM. DRAM resembles a flash storage or an HDD, rather than a RAM, from circuit designer's point of view. Oct 4, 2021 at 22:08

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