I'm asking this in relation to a question here, which may clarify the context. I'm trying to ensure that writing repeatedly to the same apparent place ("apparent", since I am taking wear leveling into account) will not result in the use of some small higher quality storage in the card (and hence, problematize testing the efficacy of the wear leveling).

  • Data is always buffered during transfers, typically the entire data block. Since ECC is involved, on a read operation the block has to be read into local RAM, checked for errors, apply the correction if necessary, and then transfer the requested block to the host PC. This buffering should not be confused with caching. According to this site some uSD cards have 32-bit ARM processors. But your questions seem to presume that all SD cards are constructed equally and will perform equally, which is unreasonable. – sawdust Oct 20 '13 at 0:09

Common sense tells me that there must be cache of size of at least one erase block. Otherwise data would be lost on writes - the whole erase block (usually 128-512KB these days afaik, although it may be smaller) must be erased and then rewritten with the updated content.

  • I think you're right. I re-ran the test using a significantly larger chunk (16 MB), which must be enough to get around this on a $5 4 GB card. – goldilocks Oct 20 '13 at 14:56

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