A decade (or more) ago when shopping for RAM one often had the option of specifying "server-grade" memory with an extra Error Correction Code (ECC). I haven't seen that as an explicit option in years. Is this because all data storage and transmission specifications now incorporate error detection and correction to such a level that the possibility of an uncorrected error is considered irrelevant?

What are the current standards for uncorrectable bit error rates (UBER) in working memory, storage, and transmission? Ultimately I assume these could be normalized to terms of "x errors per bit," or if storage degrades then "y errors per bit per year."


Both are still available - this might interest you - http://www.techspot.com/article/845-ddr3-ram-vs-ecc-memory/

  • Thanks, and good article. I would generally expect error correction to be handled by the hardware itself and not affect externally-visible performance when implemented correctly. E.g., adding correction to memory requires more raw memory space and an ECC processor to apply the correction code, but that should be wrapped up in the memory card or module. Interesting that in that article they mentioned their observed failure rate of ECC RAM, in spite of this extra complexity, is lower than non-ECC RAM. – feetwet Oct 20 '14 at 14:43

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