1

I am working with MAC to MAC MII link in my embedded board. one end of link has MPC8569 processor (free scale) and other side has BCM68610 controller (broadcom). I am trying to ping my switch from my processor but I am not able to do so.

after doing ping, I noticed tx packet error in ifconfig output.

[root@Device ~]# ifconfig eth1
eth1      Link encap:Ethernet  HWaddr 76:00:00:98:74:1A  
          inet addr:192.168.8.200  Bcast:192.168.8.255  Mask:255.255.255.0
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:12 errors:12 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000 
          RX bytes:0 (0.0 B)  TX bytes:504 (504.0 B)
          Base address:0x3200 

What could be the reasons for Tx packet error?

  1. from general networking point of view.
  2. from embedded system point of view.

This is direct connection between processor and controller so there can not be a netweok cognition problem. from what I guess, this could be due to some configuration problem of connection but I am not able to figure that out.

This is my ethtool output.

[root@Device ~]# ethtool eth1
Settings for eth1:
        Supported ports: [ ]
        Supported link modes:   1000baseT/Full 
        Supports auto-negotiation: No
        Advertised link modes:  1000baseT/Full 
        Advertised auto-negotiation: No
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 32
        Transceiver: external
        Auto-negotiation: off
        Current message level: 0x0000003f (63)
        Link detected: yes
3
  • That's not just a few errors, that's 12/12 = 100% failure. And how/why are you using ethernet for a "direct connection between processor and controller", or do you mean the direct connection is an ethernet cable? I'm unfamiliar with this type of "embedded board" setup, have a good overview link?
    – Xen2050
    Jan 30, 2015 at 12:09
  • No, its not a Ethernet Cable. Its a Media Independent Interface(MII)Link. The link that goes from ethernet port to processor is generally a MII/RGMII/SGMII link. Thats how your ethernet port talks to your processor on hardware level. Now same link can be used in between two hardware devices to get communication between them. Jan 30, 2015 at 20:31
  • Please check wiki page of MII for abstract information. you can check schematics at hardware level from here . document SD761132 A (google.co.in/…) Jan 30, 2015 at 20:33

0

You must log in to answer this question.

Browse other questions tagged .