Like any complicated thing, you can describe the way a CPU operates at various levels.
At the most fundamental level, a CPU is driven by an accurate clock. The frequency of the clock can change; think Intel’s SpeedStep. But at all times the CPU is absolutely 100% locked to the clock signal.
CPU instructions operate at a much higher level. A single instruction is a complex thing and can take anywhere from less than one cycle to thousands of cycles to complete as explained here on Wikipedia.
So basically an instruction will consume some number of clock cycles. In modern CPUs, due to technologies like multiple cores, HyperThreading, pipelining, caching, out-of-order and speculative execution, the exact number of clock cycles for a single instruction is not guaranteed, and will vary each time you issue such an instruction!
is there any information available about the variance for a specific CPU?
Yes and no. 99.99% of end-users are interested in overall performance, which can be quantified by running various benchmarks.
What you're asking for is highly technical information. Intel does not publish complete or accurate information about CPU instruction latency/throughput.
There are researchers who have taken it upon themselves to try figure this out. Here are two PDFs that may be of interest:
Unfortunately it's hard to get variance data. Quoting from the first PDF:
numbers listed are
minimum values. Cache misses, misalignment, and exceptions may increase the clock counts considerably.
Interesting reading nevertheless!