Volatile memory such as DRAM must be refreshed periodically or its content will "fade" and "be lost". What exactly happens to individual bits after power loss? Do they slowly and ineluctably revert back to what would be read as a 0 if the machine was on? Can they end up in a stable, non-zero state?

  • Note that this has nothing to do with recovering data or security risks. I am merely curious about the behaviour of memory without power. – isanae May 10 '15 at 18:04

Bits in a computer are simply a state of being. In memory and most electrical circuits, the bits are either "On" or "Off". Memory is like this. The 1's are parts of the memory that have power stored, the 0's are places where there is effectively no power.

When you turn the power off, the stored power in the "1" bits leak and they become 0's instead; then all the bits in memory are "0". This leakage occurs very fast so it is considered that when power is lost, data is lost immediately, although it does actual take some time. Typically a fraction of a second.

To put them in a stable non-zero state, you would have to change way the data is stored. In platter hard drives it is stored as a magnetic state. On a optical disc it is stored as a "pit" or a "land". So the answer is yes, you can keep the original state, but you have to change how the data is stored, or change the method in which the charge is stored.

They are actually working on this, but the current RAM is extremely fast with low latency. Given the way RAM is used, they have not found a suitable alternative the has the speed and latency that is even comparable in cost given how cheap RAM is and how much the average person or server needs.

They do make solid state RAM. I am sure there are caveats though.

  • It might be worth noting that the interpretation of low charge in the DRAM cell (capacitor) is arbitrary (i.e., low charge could be interpreted as a binary 1). It is not even necessary for every bit cell to be interpreted in the same manner (the memory controller could interpret 32 uncharged bit cells as 0xDEADBEEF). (For Flash one could even argue that the convention of interpreting a freshly erased block as all 1s is less desirable as zero initialization is more common, but I doubt such is a significant consideration.) – Paul A. Clayton May 10 '15 at 22:48
  • Interesting. Do you know what part of the hardware is in charge of interpreting the voltage in the capacitor? Is it the CPU? – isanae May 11 '15 at 3:31

Think for DRAM cells like small capacitors. Over the time they loose charge and at the end they become in one (the same for all) state.

As far as I know there is no way to keep the original state (based on the current technology)

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