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AFAIK, the following definitions apply:

  • I/O ports are memory adresses used as an interface to communicate with external devices e.g. a printer.
  • A physical port (i.e. connector) is the physical interface that you plug the device in.

As you can see by this definition, they are two different things. However, Is this (my definition) correct? Or is this actually one thing and the physical port has a memory address?

I interpreted the former definition from a book I'm reading on computer architecture, but now I'm reading more of it I'm slowly getting confused. I think my definitions might be wrong and I misinterpreted the book.

I would really appreciate it if the answer could briefly explain how I/O ports are used as well... I just don't get it.

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    An I/O port only has a memory address when it is memory mapped. Otherwise its address is in I/O port space, which require different processor instructions (e.g. input and output) than memory access (e.g. load and store). Some processor architectures (e.g. ARM) do not use I/O addresses, and all device registers are memory mapped.
    – sawdust
    Jun 3, 2015 at 22:45
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    @sawdust imo even port-mapped io also has memory address, because io address space is just a special memory address space
    – Chen Li
    Nov 1, 2019 at 7:18
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    @陳力 -- You are entitled to your incorrect opinion. See superuser.com/questions/703695/… for three answers that indicate that you are wrong.
    – sawdust
    Nov 4, 2019 at 8:36
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    @sawdust PMIO can essentially be thought as a MMIO with a seperate memory address-space just for I/O.
    – Chen Li
    Nov 4, 2019 at 8:52
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    @陳力 -- You quote the 1-vote answer, and ignore the answer with 23 up-votes? Address space is such a simple and basic concept, why does anyone need to rely on a misleading analogy? That misleading analogy does not change the facts: e.g. there can be other address spaces besides a "memory address space".
    – sawdust
    Nov 4, 2019 at 23:08

4 Answers 4

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Is there a difference between I/O port and physical port?

The following definitions apply:

  • I/O ports are memory adresses used as an interface to communicate with external devices, eg a printer.
  • A physical port (connector) is the physical interface that you plug the device in.

Your definitions are essentially correct.

An I/O port communicates using a software (device) driver with a physical device (a device that is plugged in to a physical port).

See I/O Systems for a more detailed overview.

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An "I/O port" is really more in the software domain, and this started because of the legacy design of the Intel x86 hardware, where there was a actual difference between memory and I/O ports. You could have both devices sitting on the address bus, and when you wanted to talk to memory, you asserted a signal that 'turned off' I/O ports, and 'turned on' memory, and vise-verse if you wanted to talk to I/O. There was a different addressing scheme for memory and I/O, so the software had to keep track of that also.

The reason the memory and I/O needed to share the data bus was due to the limited amount of address space available on a 16 bit cpu (64k). As cpus evolved, the data bus grew to 32 bits (4 gig) and 64 bits (18 quintillion!) and the overhead to share wasn't needed.

With the 32 bit and 64 bit processors used now, both memory and I/O are addressed directly, the I/O devices are mapped to a different area of addresses. This method is called memory mapped I/O.

With respect to physical ports, both I/O ports and memory mapped I/O are connected to hardware that further buffers and formats (i.e. RS-232) the signal which goes to a connector that you find on the back of the computer.

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  • Your usage of "bus" is confusing to me. You seem to refer to it as regular memory. A bus, AFAIK, is a connection between two components, e.g. CPU and RAM, so you'd have three buses: data bus, control bus and address bus. The rest made sense to me :) Jan 1, 2016 at 14:09
  • I made some edits to my original answer. to help clarify the difference between port I/O and memory mapped I/O. Just think of a bus as a multi-line connection between between the cpu and any other device (memory, I/O, controllers, etc ) and yes it would have both an address bus to select device, and a data bus to transfer in/out the data. The memory / I/O control signal is an example of one of the lines on the control bus. Jan 2, 2016 at 1:33
  • "this started because of the legacy design of the Intel x86 hardware" -- False. I recall minicomputers, e.g. Data General and HP, circa 1970s, having I/O instructions and port-mapped address space. These architectures predate the Intel 8086/88. IOW Intel didn't invent port-mapped address space.
    – sawdust
    Nov 4, 2019 at 23:23
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I/O space / ports is a x86-specific legacy creation. Back in the good old says, there were multiple different address spaces (you may have seen the recent trend towards shared memory address space to better share CPU/GPU resources, such as in the PlayStation 4 and Xbox One) for addressing memory and addressing "I/O peripherals".

The I/O space was used to talk to "real" hardware peripherals, like your serial port or parallel port. Conventionally, at I/O space address 0x3F8, the first serial port on a system would be located there. To talk to this device, rather than use conventional memory access instructions, you'd issue I/O access instructions instead; on Linux for example you would use outb(), outl() or outw(), depending on the width you intend to use. Again, this is a completely different memory space than the system memory map.

As PCs and x86 matured (read: we could now natively address 32-bits of memory and more), memory-mapped I/O become more common. Now, an arbitrary memory location in the system memory map (say from 0 to 0xFFFFFFFF) could be mapped to a specific device dynamically. A PCI device will have BAR (base address registers) that require a certain amount of memory OR I/O space. Therefore, a simple read/write to say memory address 0x80000000 may actually map to a physical PCI device that flips a LED when you write a '1' to that location. This is a gross over-simplification that neglects the existence of virtual memory / per-process address space and even user- vs kernel-space addresses.

So to summarize, in my opinion and view as an electrical / computer engineer, an "IO Port" refers to a location in the x86-architecture IO Memory space that maps to some specific device. A physical port would be some of real, tangible connector on your computing device be it USB, serial, whatever.

As a fun example, if you remember playing old DOS games like Star Wars: Dark Forces, you'll recall setting up say your SoundBlaster Pro. You'll set parameters like Port 220, IRQ 5, DMA 1. This is telling the game that your soundcard is located in I/O space at 0x220, using IRQ channel 5 (remember, you didn't have a high-end APIC at this point, you probably had an Intel 8259 or two), and DMA channel 1.

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  • "I/O space / ports is a x86-specific legacy creation" -- False. I recall minicomputers, e.g. Data General and HP, circa 1970s, having I/O instructions and port-mapped address space. These architectures predate the Intel 8086/88. IOW Intel didn't invent I/O address space.
    – sawdust
    Nov 4, 2019 at 23:25
  • You seem to be updating your comment every few hours and few strongly on this topic; happy to review my answer and edit when I get a chance. My intent was to describe PCI I/O BARs specifically which to my knowledge, don’t see much attention outside of x86 Nov 4, 2019 at 23:29
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I would disagree with your statement. The term port is associated with a physical interface, such as an USB port, a db-25 (SR-232) connector, etc. As expected, the term I/O port is also frequently interpreted as the "physical" I/O pins.

However, it is true that these I/O ports, or set of pins, have associated I/O registers, so one may roughly consider an I/O port to be indeed a memory address.

In the figure below, one can see 4 I/O ports, to which you may connect cables. Each port, has associated I/O registers. For example, pin PB0 logic level (first pin in the figure) will depend on how the registers' (DDRB, PINB and PORTB) selected logic levels are combined at that pin. An I/O register, such as the DDRB, has an associated memory address which you can access through code and change its logic values.

enter image description here

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