thanks for this thread - it has helped me debug my own problem.
I have come across some "misc Chinese industrial" monitor with DP input, that behaved in this way - and, based on available information, it's the monitor's fault.
In spite of the original intentions behind DP (a single electric hop from the south bridge to the display matrix driver), the monitor does contain an "AD board", giving it the ability to select among multiple video inputs (VGA, HDMI, DP). It's the "AD board" inside the monitor that drives the HPD signal - and it's not a plain pullup.
Based on the limited information available, the HPD is normally just a static level-based (active high) indication, from the video sink to the video source (from monitor to PC), that a video sink is plugged in, in a particular Display Port socket on the video source. Plus, allegedly it can be used by the monitor to "hookflash" the HPD signal = to send an interrupt pulse to the PC, which is the only way the monitor has to ask the PC for an "AUX bus transaction" (the AUX protocol is apparently request-response, master-slave, where the PC is the master). Based on my practical experience, I doubt how much use this "interrupt" capability is - it's possibly not essential.
In my case, after cold power-up (of the display), the PC does seem to wake up the display just fine, but when the PC enters S3 sleep (suspend to RAM), something happens in the display, and it doesn't wake up after the PC wakes up. More precisely, after waking up from S3, the PC does not detect a display attached to the DP socket. Why: apparently because the display fails to pull the HPD wire high. Interestingly, if you power-cycle the monitor while the PC is asleep, the display does wake up after the PC wakes up from S3 sleep. Also, the problem doesn't occur if the PC is configured just to turn off the display to save power (or screen backlight) but the CPU and OS stay up and running. So it could be something like a "good night" that the PC tells the monitor via AUX or DP payload during the "PC going to S3 sleep" sequence, and the monitor responds by going to sleep for good.
Interestingly, in my culprit monitor, the HPD signal is inactive after a monitor power-cycle, looking pretty much identical to what it is after the host PC falling S3 asleep. But somehow the PC does wake the diplay after a cold power-up and the HPD goes high. After a wakeup from S3 (not preceded by a monitor power-cycle) the HPD remains low. As if some additional handshaking was going on - not sure if in the payload, the AUX channel or on the HPD signal itself (haven't checked with a 'scope). Either way, I suspect some firmware bug in the monitor's AD board controller chip.
I've noticed the ULPS keyword in this debate and elsewhere, typically in the context of AMD graphics. My graphics adaptor is an Intel IGP (3rd gen = Ivy Bridge in this case). A rare note or two about ULPS in the context of Intel graphics can be found in some open hardware documentation, intended for open-source driver writers. Not much use in a Windows environment. Also, intel's IGP driver config utilities used to be more decent than they are now - especially the IEGD was an excellent tweakable driver package, but now we have to live with what's available. I've tried prolonging the DelayedDetectionForDP in the registry, which had no effect. And, in the config util and VGA driver properties there's no way to "force the port up". (Nor is there an option to disable dependence on DDC, but the DDC/EDID availability seems to be a separate problem, different from the HPD input or VGA load impedance measurement.)
Ultimately, I resorted to soldering on the AD board (inside the monitor). Long story short, fortunately there was a neat PCB trace going from pin 18 at the back of the DP socket. I found a 10-Ohm resistor in series with the gate output driving the HPD signal - so I removed that. And, I attached a 1k pull-up to a nearby capacitor (MLCC) blocking the +3.3V standby voltage rail. Now the HPD line is always pulled high, as long as the display is plugged into the wall. Apparently the theoretical possibility of monitor-to-PC interrupts is not a requirement for the monitor to function properly. I'm attaching a photo merely for illustration.
No I'm not gonna mention the monitor or AD board makers. A word of caution: you cannot just short the HPD trace to +3.3V and be done with it - in my case, the gate output (HPD line driver) measured as 30 Ohms against GND when low. A short to +3.3V would blow something (you'd be lucky to fry just the gate output). This kind of a hack takes some precautions and "know how" that belong to electronics.stackexchange.com. Not to mention some basic tools: a soldering pen, a multimeter with sharp probes, and a strong magnifying glass. (And something to cleanly desolder the poppy seed sized resistor... some would use a thin stream of hot air, I may prefer a vintage soldering gun with a custom double-tipped loop made of AWG24 wire.)
